0
UCC21220A
  • UCC21220A
  • UCC21220A

UCC21220A

ACTIVE

3.0kVrms, 4A/6A dual-channel isolated gate driver with disable pin & 5V UVLO for MOSFETs & GaNFETs

Texas Instruments UCC21220A Product Info

1 April 2026 1

Parameters

Number of channels

2

Isolation rating

Basic

Power switch

IGBT, MOSFET

Withstand isolation voltage (VISO) (Vrms)

3000

Working isolation voltage (VIOWM) (Vrms)

990

Transient isolation voltage (VIOTM) (VPK)

4242

Peak output current (A)

6

Peak output current (source) (typ) (A)

4

Peak output current (sink) (typ) (A)

6

Features

Disable

Output VCC/VDD (min) (V)

6

Output VCC/VDD (max) (V)

18

Input supply voltage (min) (V)

3

Input supply voltage (max) (V)

5.5

Propagation delay time (µs)

0.028

Input threshold

CMOS, TTL

Operating temperature range (°C)

-40 to 125

Rating

Catalog

Rise time (ns)

5

Fall time (ns)

6

Undervoltage lockout (typ) (V)

5

Package

SOIC (D)-16-59.4 mm² 9.9 x 6

Features

  • Universal: dual low-side, dual high-side or half-bridge driver
  • Supports basic and functional isolation
  • CMTI greater than 125V/ns
  • Up to 4A peak source, 6A peak sink output
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • Up to 25V VDD output drive supply
    • 5V and 8V VDD UVLO Options
  • Junction temperature range (Tj) –40°C to 150°C
  • Narrow body SOIC-16 (D) package
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242VPK isolation per DIN EN IEC 60747-17 (VDE 0884-17) (planned)
    • 3000VRMS isolation for 1 minute per UL 1577 (planned)
    • CQC certification per GB4943.1-2022 (planned)
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Supports basic and functional isolation
  • CMTI greater than 125V/ns
  • Up to 4A peak source, 6A peak sink output
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • Up to 25V VDD output drive supply
    • 5V and 8V VDD UVLO Options
  • Junction temperature range (Tj) –40°C to 150°C
  • Narrow body SOIC-16 (D) package
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242VPK isolation per DIN EN IEC 60747-17 (VDE 0884-17) (planned)
    • 3000VRMS isolation for 1 minute per UL 1577 (planned)
    • CQC certification per GB4943.1-2022 (planned)

Description

The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 125V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 125V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

Subscribe to Welllinkchips !
Your Name
* Email
Submit a request