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DP83848K
  • DP83848K
  • DP83848K

DP83848K

ACTIVE

Industrial temperature, 10/100-Mbps Ethernet PHY transceiver in a 40-pin QFN package

Texas Instruments DP83848K Product Info

1 April 2026 4

Parameters

Datarate (Mbps)

10/100

Interface type

MII, RMII

Rating

Catalog

Number of ports

Single

Features

IEEE 802.3 autonegotiation, Parallel detection

Supply voltage (V)

3.3

I/O supply voltage (typ) (V)

3.3

Operating temperature range (°C)

-40 to 85

Number of LEDs

2

ESD HBM (kV)

4

Package

WQFN (RTA)-40-36 mm² 6 x 6

Features

  • Low-Power 3.3-V, 0.18-µm CMOS Technology
  • Auto-MDIX for 10/100 Mb/s
  • Energy Detection Mode
  • 3.3-V MAC Interface
  • RMII Rev. 1.2 Interface (configurable)
  • MII Interface
  • MII Serial Management Interface (MDC and MDIO)
  • IEEE 802.3 Auto-Negotiation and Parallel Detection
  • IEEE 802.3 ENDEC, 10BASE-T Transceivers and Filters
  • IEEE 802.3 PCS, 100BASE-TX Transceivers and Filters
  • Integrated ANSI X3.263 Compliant TP-PMD Physical Sub-Layer with Adaptive Equalization and Baseline Wander Compensation
  • Error-Free Operation Beyond 137 Meters
  • ESD Protection – Greater than 4 kV Human Body Model
  • Configurable LED for Link and Activity (DP83848J/K)
  • 25-MHz Clock Output (DP83848H/M/T)
  • Single Register Access for Complete PHY Status
  • 10/100 Mb/s Packet BIST (Built-in Self Test)
  • Low-Power 3.3-V, 0.18-µm CMOS Technology
  • Auto-MDIX for 10/100 Mb/s
  • Energy Detection Mode
  • 3.3-V MAC Interface
  • RMII Rev. 1.2 Interface (configurable)
  • MII Interface
  • MII Serial Management Interface (MDC and MDIO)
  • IEEE 802.3 Auto-Negotiation and Parallel Detection
  • IEEE 802.3 ENDEC, 10BASE-T Transceivers and Filters
  • IEEE 802.3 PCS, 100BASE-TX Transceivers and Filters
  • Integrated ANSI X3.263 Compliant TP-PMD Physical Sub-Layer with Adaptive Equalization and Baseline Wander Compensation
  • Error-Free Operation Beyond 137 Meters
  • ESD Protection – Greater than 4 kV Human Body Model
  • Configurable LED for Link and Activity (DP83848J/K)
  • 25-MHz Clock Output (DP83848H/M/T)
  • Single Register Access for Complete PHY Status
  • 10/100 Mb/s Packet BIST (Built-in Self Test)

Description

The DP83848x device addresses the quality, reliability and small form factor required for space sensitive applications in embedded systems.

The DP83848x offers performance far exceeding the IEEE specifications, with superior interoperability and industry leading performance beyond 137 meters of Cat-V cable. The DP83848x also offers Auto-MDIX to remove cabling complications. DP83848x has superior ESD protection, greater than 4 kV Human Body Model, providing extremely high reliability and robust operation, ensuring a high-level performance in all applications.

DP83848J/K offers two flexible LED indicators one for Link and the other for Speed. In addition, both MII and RMII are supported ensuring ease and flexibility of design.

The DP83848H/M/T incorporates a 25-MHz clock out that eliminates the need and hence the space and cost, of an additional clock source component.

The DP83848x is offered in small 6-mm × 6-mm WQFN 40-pin package and is ideal for industrial controls, building/factory automation, transportation, test equipment and wire-less base stations.

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