Texas Instruments SN74LVC16373A Product Info

Parameters

Number of channels	16
Technology family	LVC
Supply voltage (min) (V)	1.65
Supply voltage (max) (V)	3.6
Input type	Standard CMOS
Output type	3-State
Clock frequency (max) (MHz)	100
IOL (max) (mA)	24
IOH (max) (mA)	-24
Supply current (max) (µA)	20
Features	Balanced outputs, Flow-through pinout, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)
Operating temperature range (°C)	-40 to 125
Rating	Catalog

SSOP (DL)-48-164.358 mm² 15.88 x 10.35

Member of the Texas Instruments
Widebus™ Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 4.2 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Live-Insertion, Partial-Power-Down
Mode, and Back-Drive Protection
Supports Mixed-Mode Signal Operation (5-V Input
and Outputand Output Voltages With 3.3-V V_CC)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

Member of the Texas Instruments
Widebus™ Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 4.2 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Live-Insertion, Partial-Power-Down
Mode, and Back-Drive Protection
Supports Mixed-Mode Signal Operation (5-V Input
and Outputand Output Voltages With 3.3-V V_CC)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

The SN74LVC16373A device is a 16-bit transparent D-type latch which is designed for 1.65-V to 3.6-V V_CC operation.