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DS91D180
  • DS91D180
  • DS91D180
  • DS91D180

DS91D180

ACTIVE

100-MHz M-LVDS line driver/receiver pair

Texas Instruments DS91D180 Product Info

1 April 2026 1

Parameters

Function

Transceiver

Protocols

M-LVDS

Number of transmitters

1

Number of receivers

1

Supply voltage (V)

3.3

Signaling rate (Mbps)

200

Input signal

LVTTL, M-LVDS

Output signal

LVTTL, M-LVDS

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Package

SOIC (D)-14-51.9 mm² 8.65 x 6

Features

  • DC to 100+ MHz / 200+ Mbps Low Power, Low EMI Operation
  • Optimal for ATCA, uTCA Clock Distribution Networks
  • Meets or Exceeds TIA/EIA-899 M-LVDS Standard
  • Wide Input Common Mode Voltage for Increased Noise Immunity
  • DS91D180 has Type 1 Receiver Input
  • DS91C180 has Type 2 Receiver Input for Fail-Safe Functionality
  • Industrial Temperature Range
  • Space Saving SOIC-14 Package (JEDEC MS-012)

All trademarks are the property of their respective owners.

  • DC to 100+ MHz / 200+ Mbps Low Power, Low EMI Operation
  • Optimal for ATCA, uTCA Clock Distribution Networks
  • Meets or Exceeds TIA/EIA-899 M-LVDS Standard
  • Wide Input Common Mode Voltage for Increased Noise Immunity
  • DS91D180 has Type 1 Receiver Input
  • DS91C180 has Type 2 Receiver Input for Fail-Safe Functionality
  • Industrial Temperature Range
  • Space Saving SOIC-14 Package (JEDEC MS-012)

All trademarks are the property of their respective owners.

Description

The DS91D180 and DS91C180 are 100 MHz M-LVDS (Multipoint Low Voltage Differential Signaling) line driver/receiver pairs designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a bus interface standard (TIA/EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver thresholds and increased drive strength are sone of the key enhancments that make M-LVDS devices an ideal choice for distributing signals via multipoint networks.

The DS91D180/DS91C180 driver input accepts LVTTL/LVCMOS signals and converts them to differential M-LVDS signal levels. The DS91D180/DS91C180 receiver accepts low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL and CML) and converts them to 3V LVCMOS signals. The DS91D180 device has a M-LVDS type 1 receiver input with no offset.The DS91C180 device has a type 2 receiver input which enable failsafe functionality.

The DS91D180 and DS91C180 are 100 MHz M-LVDS (Multipoint Low Voltage Differential Signaling) line driver/receiver pairs designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a bus interface standard (TIA/EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver thresholds and increased drive strength are sone of the key enhancments that make M-LVDS devices an ideal choice for distributing signals via multipoint networks.

The DS91D180/DS91C180 driver input accepts LVTTL/LVCMOS signals and converts them to differential M-LVDS signal levels. The DS91D180/DS91C180 receiver accepts low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL and CML) and converts them to 3V LVCMOS signals. The DS91D180 device has a M-LVDS type 1 receiver input with no offset.The DS91C180 device has a type 2 receiver input which enable failsafe functionality.

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