Product
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DLPC3421
  • DLPC3421
  • DLPC3421
  • DLPC3421
  • DLPC3421

DLPC3421

ACTIVE

DLP® display controller for DLP160CP (0.16 nHD) DMD

Texas Instruments DLPC3421 Product Info

1 April 2026 1

Parameters

Component type

Display Controller

Chipset family

DLP160CP, DLPA2000, DLPA2005, DLPC3421

Display resolution (max)

nHD (640x360)

Operating temperature range (°C)

0 to 70

Rating

Catalog

Package

NFBGA (ZVB)-176-49 mm² 7 x 7

Features

  • Display controller for DLP160CP DMD
  • Two supported modes:
    • nHD mode configuration
      • Display 640×360 pixels on-screen
      • Input frame rates up to 360Hz
      • Supports input resolutions up to WVGA
    • HD mode configuration
      • Display 1280×720 pixels on-screen
      • Input frame rates up to 60Hz
      • Supports input resolutions up to HD
  • Pixel data processing:
    • Content adaptive illumination control (CAIC)
    • Local area brightness boost (LABB)
    • 1D Keystone correction
    • Color coordinate adjustment
    • Active power management processing
    • Programmable degamma
    • Color space conversion
    • 4:2:2 to 4:4:4 chroma interpolation
  • 24-bit, input pixel interface support:
    • Parallel interface protocols
    • Pixel clock up to 155MHz
    • Multiple input pixel data format options
    • FPD-Link through FPGA in HD Mode
  • MIPI DSI (display serial interface) type 3:
    • 1–4 lanes, up to 470Mbps lane speed
  • External flash support
  • Auto DMD parking at power down
  • Embedded frame memory (eDRAM)
  • System features:
    • I2C device control
    • Programmable splash screens
    • Programmable LED current control
    • Display image rotation
  • Pair with DLPA2000, DLPA2005, and DLPA3000 PMIC (power management integrated circuit) and LED driver
  • Display controller for DLP160CP DMD
  • Two supported modes:
    • nHD mode configuration
      • Display 640×360 pixels on-screen
      • Input frame rates up to 360Hz
      • Supports input resolutions up to WVGA
    • HD mode configuration
      • Display 1280×720 pixels on-screen
      • Input frame rates up to 60Hz
      • Supports input resolutions up to HD
  • Pixel data processing:
    • Content adaptive illumination control (CAIC)
    • Local area brightness boost (LABB)
    • 1D Keystone correction
    • Color coordinate adjustment
    • Active power management processing
    • Programmable degamma
    • Color space conversion
    • 4:2:2 to 4:4:4 chroma interpolation
  • 24-bit, input pixel interface support:
    • Parallel interface protocols
    • Pixel clock up to 155MHz
    • Multiple input pixel data format options
    • FPD-Link through FPGA in HD Mode
  • MIPI DSI (display serial interface) type 3:
    • 1–4 lanes, up to 470Mbps lane speed
  • External flash support
  • Auto DMD parking at power down
  • Embedded frame memory (eDRAM)
  • System features:
    • I2C device control
    • Programmable splash screens
    • Programmable LED current control
    • Display image rotation
  • Pair with DLPA2000, DLPA2005, and DLPA3000 PMIC (power management integrated circuit) and LED driver

Description

The DLPC3421 digital controller, part of the DLP160CP chipset, enables operation of the DLP160CP digital micromirror device (DMD). The DLPC3421 controller provides a convenient, multifunctional interface between user electronics and the DMD, enabling small form factor and low power display applications.

The DLPC3421 digital controller, part of the DLP160CP chipset, enables operation of the DLP160CP digital micromirror device (DMD). The DLPC3421 controller provides a convenient, multifunctional interface between user electronics and the DMD, enabling small form factor and low power display applications.

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