0
SN74LV595A
  • SN74LV595A
  • SN74LV595A
  • SN74LV595A
  • SN74LV595A
  • SN74LV595A
  • SN74LV595A
  • SN74LV595A
  • SN74LV595A

SN74LV595A

ACTIVE

Eight-bit shift registers with 3-state output registers

Texas Instruments SN74LV595A Product Info

1 April 2026 1

Parameters

Configuration

Serial-in, Parallel-out

Bits (#)

8

Technology family

LV-A

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Input type

Standard CMOS

Output type

3-State

Clock frequency (MHz)

95

IOL (max) (mA)

16

IOH (max) (mA)

-16

Supply current (max) (µA)

20

Features

Balanced outputs, Output register, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Operating temperature range (°C)

-40 to 125

Rating

Catalog

Package

SOIC (D)-16-59.4 mm² 9.9 x 6

Features

  • V CC operation of 2 V to 5.5 V
  • Maximum t pd of 7.1 ns at 5 V
  • Typical V OLP (output ground bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (output V OH undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
  • Support mixed-mode voltage operation on all ports
  • 8-bit serial-in, parallel-out shift
  • I off supports live insertion, partial power-down mode, and back-drive protection
  • Shift register has direct clear
  • Latch-up performance exceeds 250 mA per JESD 17
  • V CC operation of 2 V to 5.5 V
  • Maximum t pd of 7.1 ns at 5 V
  • Typical V OLP (output ground bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (output V OH undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
  • Support mixed-mode voltage operation on all ports
  • 8-bit serial-in, parallel-out shift
  • I off supports live insertion, partial power-down mode, and back-drive protection
  • Shift register has direct clear
  • Latch-up performance exceeds 250 mA per JESD 17

Description

The SN74LV595A device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered.

The SN74LV595A device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered.

Subscribe to Welllinkchips !
Your Name
* Email
Submit a request