0
ACTIVE
Sample rate (max) (Msps) |
65 |
Resolution (Bits) |
18 |
Number of input channels |
2 |
Interface type |
Serial LVDS |
Analog input BW (MHz) |
200 |
Features |
Bypass Mode, Decimating Filter, Differential Inputs, Dual Channel, High Dynamic Range, High Performance, Internal Reference, LVDS interface, Low Power, Low latency |
Rating |
Space |
Peak-to-peak input voltage range (V) |
3.2 |
Power consumption (typ) (mW) |
186 |
Architecture |
SAR |
SNR (dB) |
83 |
ENOB (Bits) |
13.5 |
SFDR (dB) |
85 |
Operating temperature range (°C) |
-55 to 105 |
Input buffer |
No |
Radiation, TID (typ) (krad) |
300 |
Radiation, SEL (MeV·cm2/mg) |
75 |
CFP (HBP)-64-862.0096 mm² 29.36 x 29.36
The ADC3683-SP is a low latency, low noise, and ultra low power 18-bit 65MSPS high-speed dual channel ADC. Designed for best noise performance, the ADC delivers a noise spectral density of −160dBFS/Hz combined with excellent linearity and dynamic range. The ADC3683-SP offers DC precision together with IF sampling support to enable the design of a wide range of applications. The low latency architecture (as low as 1 clock cycle latency) and high sample rate also enable high speed control loops. The ADC consumes only 84mW/ch (1/2-swing enabled) at 65Msps and the power consumption scales well with sampling rate.
The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device also integrates a digital down converter (DDC) to help reduce the data rate and lower system power consumption. The ADC3683-SP is pin-to-pin compatible with the 14-bit, 125MSPS, ADC3664-SP. The device comes in a 64-pin CFP package (10.9mm x 10.9mm), and supports a temperature range from −55°C to +125°C.
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