0
ACTIVE
Rating |
Catalog |
Ground offset voltage (max) (V) |
10 |
Bits (#) |
2 |
Topology |
Push-Pull |
Applications |
GPIO |
Forward/reverse channels |
2 forward / 0 reverse |
Isolation rating |
Functional |
Data rate (max) (Mbps) |
250 |
Prop delay (ns) |
5.9 |
CMTI (V/µs) |
1000 |
Technology family |
TXG |
Vin (min) (V) |
1.71 |
Vin (max) (V) |
5.5 |
Vout (min) (V) |
1.71 |
Vout (max) (V) |
5.5 |
Current consumption per channel (1 Mbps) (typ) (mA) |
3.3 |
Features |
Partial power down (Ioff) |
SOIC (D)-8-29.4 mm² 4.9 x 6
The TXG102x is a 2-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±10V. Compared to traditional level shifters, the TXG102x family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.
VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. The leakage between GNDA and GNDB is <40nA when VCC to GND is shorted.
The TXG102x device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 20VPP up to 45MHz (Figure 8-3). This device can support multiple interfaces such as UART, GPIO, and JTAG.
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
