Product
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SN74LV74A-Q1
  • SN74LV74A-Q1
  • SN74LV74A-Q1
  • SN74LV74A-Q1
  • SN74LV74A-Q1

SN74LV74A-Q1

ACTIVE

Automotive Catalog Dual Positive-Edge-Triggered D-Type Flip-Flop

Texas Instruments SN74LV74A-Q1 Product Info

1 April 2026 0

Parameters

Number of channels

2

Technology family

LV-A

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

110

IOL (max) (mA)

12

IOH (max) (mA)

-12

Supply current (max) (µA)

20

Features

Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff)

Operating temperature range (°C)

-40 to 125

Rating

Automotive

Package

SOIC (D)-14-51.9 mm² 8.65 x 6

Features

  • Qualified for automotive applications
  • Operation of 2-V to 5.5-V V CC
  • Max t pd of 13 ns at 5 V
  • Typical V OLP (output ground bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (output V OH undershoot) >2.3 V at V CC = 3.3 V, T A = 25°C
  • Support mixed-mode voltage operation on all ports
  • I off supports partial-power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD 17
  • Qualified for automotive applications
  • Operation of 2-V to 5.5-V V CC
  • Max t pd of 13 ns at 5 V
  • Typical V OLP (output ground bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (output V OH undershoot) >2.3 V at V CC = 3.3 V, T A = 25°C
  • Support mixed-mode voltage operation on all ports
  • I off supports partial-power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD 17

Description

This dual positive-edge-triggered D-type flip-flop is designed for 2-V to 5.5-V V CC operation.

This dual positive-edge-triggered D-type flip-flop is designed for 2-V to 5.5-V V CC operation.

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