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TXE8116-Q1
  • TXE8116-Q1
  • TXE8116-Q1

TXE8116-Q1

PREVIEW

Automotive 16-bit SPI bus I/O expander with interrupt, reset and I/O configurable registers

Texas Instruments TXE8116-Q1 Product Info

1 April 2026 1

Parameters

Number of I/Os

16

Features

Configuration registers, Fail-safe, Interrupt pin, Reset pin

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Rating

Automotive

Frequency (max) (MHz)

10

Operating temperature range (°C)

-40 to 125

Package

VSSOP (DGS)-24-29.89 mm² 6.1 x 4.9

Features

  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Functional safety-capable
  • Operating supply voltage range of 1.65V to 5.5V
  • Low standby current consumption of 2.3µA typical
  • SPI SCLK Frequency
    • 10MHz from 3.3V to 5.5V
    • 5MHz from 1.65V to 5.5V
  • Active-low reset input (RESET)
  • 5V tolerant input and output ports
  • Buit-in fail-safe I/O feature
  • Open-drain active-low interrupt output (INT)
  • Individual I/O control and the glitch filter supported on all inputs of the GPIOs
  • SPI daisy-chain supported
  • I/O reading burst mode supported
  • I/O polarity inversion supported
  • Bus-hold feature to maintain the last I/O state
  • Latched outputs with high-current drive capability for directly driving LEDs
  • Latch-up performance exceeds 100mA per AEC Q100-004
  • ESD protection exceeds AEC - Q100 requirements
    • 2000V Human-body model (AEC - Q100-002)
    • 1000V Charged-device model (AEC - Q100-011)
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Functional safety-capable
  • Operating supply voltage range of 1.65V to 5.5V
  • Low standby current consumption of 2.3µA typical
  • SPI SCLK Frequency
    • 10MHz from 3.3V to 5.5V
    • 5MHz from 1.65V to 5.5V
  • Active-low reset input (RESET)
  • 5V tolerant input and output ports
  • Buit-in fail-safe I/O feature
  • Open-drain active-low interrupt output (INT)
  • Individual I/O control and the glitch filter supported on all inputs of the GPIOs
  • SPI daisy-chain supported
  • I/O reading burst mode supported
  • I/O polarity inversion supported
  • Bus-hold feature to maintain the last I/O state
  • Latched outputs with high-current drive capability for directly driving LEDs
  • Latch-up performance exceeds 100mA per AEC Q100-004
  • ESD protection exceeds AEC - Q100 requirements
    • 2000V Human-body model (AEC - Q100-002)
    • 1000V Charged-device model (AEC - Q100-011)

Description

The TXE81XX-Q1 devices provide general purpose parallel input/output (I/O) expansion for the four wire Serial Peripheral Interface (SPI) protocol and is designed for 1.65V to 5.5V VCC operation.

The device supports 10MHz from 3.3V to 5.5V and 5MHz from 1.65V to 5.5V. I/O expanders, such as the TXE81XX-Q1, provide a simple solution when additional I/Os are needed for switches, sensors, push-buttons, LEDs, and fans.

The TXE81XX-Q1 devices have I/O ports, which include additional features designed to enhance the I/O performance in terms of speed, power consumption, and flexibility. The additional features are: enable/disable pull-up and pull-down resistors, latchable inputs, maskable interrupt, interrupt status register, programmable open-drain or push-pull outputs, and a fail-safe register mode which is enabled by the FAIL-SAFE pin.

The TXE81XX-Q1 devices provide general purpose parallel input/output (I/O) expansion for the four wire Serial Peripheral Interface (SPI) protocol and is designed for 1.65V to 5.5V VCC operation.

The device supports 10MHz from 3.3V to 5.5V and 5MHz from 1.65V to 5.5V. I/O expanders, such as the TXE81XX-Q1, provide a simple solution when additional I/Os are needed for switches, sensors, push-buttons, LEDs, and fans.

The TXE81XX-Q1 devices have I/O ports, which include additional features designed to enhance the I/O performance in terms of speed, power consumption, and flexibility. The additional features are: enable/disable pull-up and pull-down resistors, latchable inputs, maskable interrupt, interrupt status register, programmable open-drain or push-pull outputs, and a fail-safe register mode which is enabled by the FAIL-SAFE pin.

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