Product
0
SN74LV138A-Q1
  • SN74LV138A-Q1
  • SN74LV138A-Q1

SN74LV138A-Q1

ACTIVE

Automotive three-line to eight-line decoders/demultiplexers

Texas Instruments SN74LV138A-Q1 Product Info

1 April 2026 1

Parameters

Technology family

LV-A

Number of channels

1

Operating temperature range (°C)

-40 to 125

Rating

Automotive

Supply current (max) (µA)

20

Package

WQFN (BQB)-16-8.75 mm² 3.5 x 2.5

Features

  • AEC-Q100 qualified for automotive applications:

    • Device temperature grade 1: –40°C to +125°C, TA

    • Device HBM ESD Classification Level 2

    • Device CDM ESD Classifcation Level C6

  • 2 V to 5.5 V VCC operation
  • Maximum tpd of 9.5 ns at 5 V
  • Typical VOLP (output ground bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
  • Support mixed-mode voltage operation on all ports
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD 17

  • AEC-Q100 qualified for automotive applications:

    • Device temperature grade 1: –40°C to +125°C, TA

    • Device HBM ESD Classification Level 2

    • Device CDM ESD Classifcation Level C6

  • 2 V to 5.5 V VCC operation
  • Maximum tpd of 9.5 ns at 5 V
  • Typical VOLP (output ground bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
  • Support mixed-mode voltage operation on all ports
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD 17

Description

The SN74LV138A-Q1 device is 3-line to 8-line decoders/demultiplexers designed for 2 V to 5.5 V VCC operation.

The conditions at the binary-select inputs (A0, A1, A2) and the three enable inputs (G2, G0, G1) select one of eight output lines. The two active-low (G0, G1) and one active-high (G2) enable inputs reduce the need for external gates or inverters when expanding.

The SN74LV138A-Q1 device is 3-line to 8-line decoders/demultiplexers designed for 2 V to 5.5 V VCC operation.

The conditions at the binary-select inputs (A0, A1, A2) and the three enable inputs (G2, G0, G1) select one of eight output lines. The two active-low (G0, G1) and one active-high (G2) enable inputs reduce the need for external gates or inverters when expanding.

Subscribe to Welllinkchips !
Your Name
* Email
Popular Posts
Featured Parts More >
Submit a request
CONTACT US
Company address

WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK

Send Enquiry
SEND e-MAIL
Office hour from 9am to 6pm ,
Monday through Friday, UTC/GMT +8