Product
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SN74AVC4T234
  • SN74AVC4T234
  • SN74AVC4T234
  • SN74AVC4T234

SN74AVC4T234

ACTIVE

4-bit dual-supply bus transceiver with config voltage translation

Texas Instruments SN74AVC4T234 Product Info

1 April 2026 3

Parameters

Bits (#)

4

Data rate (max) (Mbps)

380

Topology

Push-Pull

Direction control (typ)

Direction-controlled

Vin (min) (V)

0.9

Vin (max) (V)

3.6

Vout (min) (V)

0.9

Vout (max) (V)

3.6

Applications

JTAG

Features

Partial power down (Ioff)

Technology family

AVC

Supply current (max) (mA)

0.0036

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Package

NFBGA (ZWA)-11-2.8 mm² 2 x 1.4

Features

  • Wide operating VCC range of 0.9 V to 3.6 V
  • 3.6-V I/O Tolerant to support mixed-mode signal operation
  • Max tpd of 3.7 ns at 3.3 V
  • Balanced propagation delays: tPLH = tPHL
  • Low static-power consumption, 5-µA Max ICC
  • Outputs disabled if either VCC goes to 0V
  • ±3-mA Output drive at 1.8 V
  • 26-Ω series resistor on A-side outputs
  • Ioff supports partial power-down-mode operation
  • Input hysteresis allows slow input transition and better switching noise immunity at input
  • Maximum data rates
    • 380 Mbps (1.8-V to 3.3-V translation)
    • 200 Mbps (<1.8-V to 3.3-V translation)
    • 200 Mbps (translate to 2.5 V or 1.8 V)
    • 150 Mbps (translate to 1.5 V)
    • 100 Mbps (translate to 1.2 V)
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V human-body model (A114-A)
    • 500-V charged-device model (C101)
  • Wide operating VCC range of 0.9 V to 3.6 V
  • 3.6-V I/O Tolerant to support mixed-mode signal operation
  • Max tpd of 3.7 ns at 3.3 V
  • Balanced propagation delays: tPLH = tPHL
  • Low static-power consumption, 5-µA Max ICC
  • Outputs disabled if either VCC goes to 0V
  • ±3-mA Output drive at 1.8 V
  • 26-Ω series resistor on A-side outputs
  • Ioff supports partial power-down-mode operation
  • Input hysteresis allows slow input transition and better switching noise immunity at input
  • Maximum data rates
    • 380 Mbps (1.8-V to 3.3-V translation)
    • 200 Mbps (<1.8-V to 3.3-V translation)
    • 200 Mbps (translate to 2.5 V or 1.8 V)
    • 150 Mbps (translate to 1.5 V)
    • 100 Mbps (translate to 1.2 V)
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V human-body model (A114-A)
    • 500-V charged-device model (C101)

Description

This 4-bit non-inverting bus transceiver uses two separate configurable power-supply rails to enable asynchronous communication between B-port inputs and A-port outputs. The A port is designed to track VCCA while the B port is designed to track VCCB. Both VCCA and VCCB are configurable from 0.9 V to 3.6 V.

The SN74AVC4T234 solution offers the industry’s low-power needs in battery-powered portable applications by ensuring both a very low static and dynamic power consumption across the entire VCC range of 0.9 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then A-side ports are in the high-impedance state.

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