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SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125
  • SN74AHC125

SN74AHC125

ACTIVE

4-ch, 2-V to 5.5-V buffers with 3-state outputs

Texas Instruments SN74AHC125 Product Info

1 April 2026 0

Parameters

Technology family

AHC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Number of channels

4

IOL (max) (mA)

8

Supply current (max) (µA)

40

IOH (max) (mA)

-8

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Package

PDIP (N)-14-181.42 mm² 19.3 x 9.4

Features

  • Operating range of 2V to 5.5V
  • Latch-up performance exceeds 250mA per JESD 17
  • Four individual output enable pins
  • Operating range of 2V to 5.5V
  • Latch-up performance exceeds 250mA per JESD 17
  • Four individual output enable pins

Description

The SNx4AHC125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable ( OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.

To ensure the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SNx4AHC125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable ( OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.

To ensure the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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