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DS125RT410
  • DS125RT410
  • DS125RT410

DS125RT410

ACTIVE

9.8 to 12.5-Gbps quad channel retimer with adaptive EQ and CDR

Texas Instruments DS125RT410 Product Info

1 April 2026 0

Parameters

Type

Retimer

Number of channels

4

Speed (max) (Gbpp)

12.5

Input compatibility

AC-coupling, CML

Protocols

10G-SR/LR, 40G-SR4/LR4, CPRI, General purpose, Infiniband, Interlaken

Operating temperature range (°C)

-40 to 85

Package

WQFN (RHS)-48-49 mm² 7 x 7

Features

  • Each Channel Independently Locks to Data Rates
    From 9.8 to 12.5 Gbps and Submultiples
  • Fast Lock Operation Based on Protocol-Select
    Mode
  • Low Latency (≈ 300 ps)
  • Adaptive Equalization up to 34-dB Boost at 5 GHz
  • Adjustable Transmit VOD: 600 to 1300 mVp-p
  • Adjustable Transmit De-emphasis to –15 dB
  • Typical Power Dissipation (EQ+CDR+DE):
    150 mW/Channel
  • Programmable Output Polarity Inversion
  • Input Signal Detection, CDR Lock Detection and
    Indicator
  • On-Chip Eye Monitor (EOM), PRBS Generator
  • Single 2.5-V ± 5% Power Supply
  • SMBus and EEPROM ConfigurationModes
  • Operating Temperature Range of –40 to 85°C
  • WQFN 48-Pin 7-mm × 7-mm Package
  • Easy Pin Compatible Upgrade Between Repeater
    and Retimers
    • DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
    • DS100DF410 (EQ+DFE+CDR+DE):
      10.3125 Gbps
    • DS110RT410 (EQ+CDR+DE): 8.5 to
      11.3 Gbps
    • DS110DF410 (EQ+DFE+CDR+DE): 8.5 to
      11.3 Gbps
    • DS125RT410 (EQ+CDR+DE): 9.8 to
      12.5 Gbps
    • DS125DF410 (EQ+DFE+CDR+DE):
      9.8 to 12.5 Gbps
    • DS100BR410 (EQ+DE): Up to
      0.3125 Gbps
  • Each Channel Independently Locks to Data Rates
    From 9.8 to 12.5 Gbps and Submultiples
  • Fast Lock Operation Based on Protocol-Select
    Mode
  • Low Latency (≈ 300 ps)
  • Adaptive Equalization up to 34-dB Boost at 5 GHz
  • Adjustable Transmit VOD: 600 to 1300 mVp-p
  • Adjustable Transmit De-emphasis to –15 dB
  • Typical Power Dissipation (EQ+CDR+DE):
    150 mW/Channel
  • Programmable Output Polarity Inversion
  • Input Signal Detection, CDR Lock Detection and
    Indicator
  • On-Chip Eye Monitor (EOM), PRBS Generator
  • Single 2.5-V ± 5% Power Supply
  • SMBus and EEPROM ConfigurationModes
  • Operating Temperature Range of –40 to 85°C
  • WQFN 48-Pin 7-mm × 7-mm Package
  • Easy Pin Compatible Upgrade Between Repeater
    and Retimers
    • DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
    • DS100DF410 (EQ+DFE+CDR+DE):
      10.3125 Gbps
    • DS110RT410 (EQ+CDR+DE): 8.5 to
      11.3 Gbps
    • DS110DF410 (EQ+DFE+CDR+DE): 8.5 to
      11.3 Gbps
    • DS125RT410 (EQ+CDR+DE): 9.8 to
      12.5 Gbps
    • DS125DF410 (EQ+DFE+CDR+DE):
      9.8 to 12.5 Gbps
    • DS100BR410 (EQ+DE): Up to
      0.3125 Gbps

Description

The DS125RT410 is a four-channel retimer with integrated signal conditioning. The device includes a fully adaptive continuous-time linear equalizer (CTLE), clock and data recovery (CDR), and a transmit de-emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1 × 10–15. For channels with a high amount of crosstalk, the DS125DF410 should be used because it has self calibrating 5-tap decision-feedback equalizer (DFE).

Each channel can independently lock to data rate from 9.8 to 12.5 Gbps, and associated subrates (divide by 2, 4, and 8) to support a variety of communication protocols. A 25-MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not used for training the PLL and does not need to be synchronous with the serial data.

The programmable settings can be applied using the SMBus (I2C) interface, or they can be loaded through an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning.

The DS125RT410 is a four-channel retimer with integrated signal conditioning. The device includes a fully adaptive continuous-time linear equalizer (CTLE), clock and data recovery (CDR), and a transmit de-emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1 × 10–15. For channels with a high amount of crosstalk, the DS125DF410 should be used because it has self calibrating 5-tap decision-feedback equalizer (DFE).

Each channel can independently lock to data rate from 9.8 to 12.5 Gbps, and associated subrates (divide by 2, 4, and 8) to support a variety of communication protocols. A 25-MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not used for training the PLL and does not need to be synchronous with the serial data.

The programmable settings can be applied using the SMBus (I2C) interface, or they can be loaded through an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning.

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