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If you've searched "composite current source," you might be coming from one of two very different places. Maybe you're a hardware engineer looking to improve the accuracy of a current mirror in your analog design. Or maybe you're a chip designer who keeps seeing "CCS" in Liberty files and wants to know what it actually means. This guide covers both — starting with the fundamentals of the circuit, then moving into how the term is used in IC timing analysis.
A current source is a circuit element that delivers a steady, predictable current regardless of the load connected to it. In an ideal world, that current never changes — but real-world transistors aren't ideal. Temperature, supply voltage, and transistor mismatches all cause drift.
A composite current source solves this by combining two or more transistors in a way that each one's weaknesses are compensated by the other. Instead of relying on a single device, you're building a small team of transistors that collectively produce a far more stable output.
The word "composite" just means the circuit is built from multiple components working together — as opposed to a simple single-transistor current source that stands alone.
This idea shows up in two major contexts in electronics:
· Circuit-level design: Composite current sources like the Wilson current mirror or Widlar current source are used in analog ICs, op-amps, and precision references.
· IC timing models: In chip design tools (EDA), "CCS" refers to the Composite Current Source model — a standard for how a logic cell's timing behavior is described in Liberty files.
The simplest current source is just a transistor with a fixed bias voltage on its base or gate. It works, but it has a fundamental flaw: the output current changes with the output voltage (Vce or Vds). This is called finite output impedance, and it means your "constant" current is only approximately constant.
If you're designing a precision ADC reference or the bias network of a high-gain op-amp, "approximately constant" isn't good enough.
A composite current source adds a second transistor — or even a third — to form a feedback loop. The classic example is the Wilson current mirror (BJT version):
· Q1 is the input (reference) transistor.
· Q2 mirrors the current from Q1 to the output.
· Q3 adds local feedback: if the output current tries to drift, Q3 senses the change and corrects it through Q2's base drive.
The result is an output impedance that is roughly β times higher than a basic current mirror — where β is the transistor's current gain. In practical terms, this means the output current stays much more constant as the output voltage varies.
MOSFET-based composite current sources work on the same principle. A cascode structure stacks two MOSFETs in series: the lower device sets the current, and the upper device keeps the lower transistor's drain voltage constant. This dramatically raises the output impedance and reduces sensitivity to supply fluctuations.
High output impedance is the defining goal of a composite current source. A truly ideal current source has infinite output impedance — it doesn't "care" what voltage appears at its output, it just keeps delivering the same current. The closer you get to infinite output impedance in practice, the more accurately your circuit performs.
A simple current mirror might have output impedance in the tens of kilohms. A well-designed composite current source can push this to several megohms — a 100× improvement in the same silicon area.
When someone asks why composite current sources are worth the extra transistors, the answer usually comes down to four things.
The first is output impedance, already covered above. The second is temperature stability: because multiple transistors track each other thermally, the temperature coefficients partially cancel out. A single transistor's current drifts with temperature; a matched pair's drift largely cancels.
The third benefit is supply voltage rejection. A simple current source's output rides up and down with the supply. Composite structures use the feedback transistor to isolate the output from supply variations, making them far more useful in noisy or variable-voltage systems.
The fourth is current matching accuracy. In current mirror applications — where you need two or more identical currents in different parts of a chip — composite structures produce far better matching than simple mirrors, especially at low currents where transistor non-idealities are most pronounced.
|
Property |
Simple Current Source |
Composite Current Source |
|
Output impedance |
Low (~kΩ) |
High (~MΩ) |
|
Temperature stability |
Moderate |
Good |
|
Supply rejection |
Limited |
Strong |
|
Current matching accuracy |
±5–10% typical |
±0.1–1% achievable |
|
Transistor count |
1–2 |
3–5 |
If you're working in chip design rather than discrete analog circuits, "CCS" means something different but related: it's the Composite Current Source timing model, a standard defined by Synopsys for describing how digital logic cells behave in Liberty (.lib) timing library files.
Understanding why this model exists requires a quick look at the history.
In the 1990s, the standard was NLDM (Nonlinear Delay Model). It characterizes a cell's delay and output slew as lookup tables (LUTs) indexed by input slew and output capacitance. Simple, fast, and accurate enough for the process nodes of that era.
As process nodes shrank below 130nm and interconnect delays started dominating over gate delays, NLDM's fixed-capacitance receiver model became a meaningful source of error. ECSM (Effective Current Source Model) emerged in the 2000s as a compromise: it kept the LUT structure but modeled the driver as an effective current waveform.
By the time designs reached 28nm and below, neither model was precise enough. The industry moved to CCS.
The core idea of CCS is elegant: instead of characterizing a cell with a single delay number and slew number, it characterizes the driver as a time- and voltage-dependent current source.
The driver model stores the output current as a function of both time and output voltage — not just one of them. This matters because at advanced nodes, the current profile during a logic transition is highly sensitive to the load it's driving.
On the receiver side, CCS splits the input capacitance into two components: C1 (the capacitance before the signal threshold crossing) and C2 (after). This split implicitly captures the Miller effect — the dynamic change in input capacitance depending on the state of the logic transition.
At 28nm and below, interconnect resistance and capacitance are no longer negligible. A signal traveling across a metal wire on these nodes experiences delay and distortion comparable to the gate delay itself. NLDM's simplifications break down because they were designed for a world where the gate delay dominates.
CCS handles this correctly because it characterizes the current profile across the full transition waveform. The practical result: timing sign-off with CCS libraries is much more correlated with actual silicon measurements than sign-off with NLDM. For a design that takes 18–24 months to build, the cost of a timing-related re-spin makes CCS libraries non-negotiable at advanced nodes.
For anyone navigating Liberty file specifications or choosing a characterization flow, here's the practical breakdown:
|
Feature |
NLDM |
ECSM |
CCS |
|
Driver model |
Fixed Cload LUT |
Effective current waveform |
i(t,v) nonlinear current source |
|
Receiver model |
Fixed Cload |
Fixed Cload |
C1/C2 dynamic split |
|
Miller effect |
No |
Partial |
Yes |
|
PVT accuracy |
±10–15% |
±5–8% |
±1–3% |
|
Applicable nodes |
≥90nm |
65–28nm |
≤28nm (mandatory) |
|
Library file size |
Small |
Medium |
Large (~3–5× NLDM) |
|
Runtime |
Fast |
Moderate |
Slower |
The rule of thumb: if you're learning timing analysis or working on a mature node, NLDM is perfectly adequate. If you're taping out below 28nm, CCS is what your foundry and EDA toolchain will expect.
Composite current sources are the backbone of analog design. In an operational amplifier, the input differential pair needs precisely matched tail currents — any mismatch appears as input offset voltage. A Wilson mirror or cascode current source in the bias network keeps these currents matched across temperature and process variation.
In precision ADCs and DACs, the reference current must hold stable to parts per million. Composite current sources, often with laser-trimmed resistors, are what make 16-bit and 24-bit accuracy achievable.
Every major foundry (TSMC, Samsung, GlobalFoundries) provides CCS timing libraries for their ≤28nm process nodes. EDA platforms including Synopsys PrimeTime and Cadence Tempus consume CCS Liberty files directly. For any design targeting these nodes — automotive ICs, SoC, high-speed SerDes — CCS-based sign-off is the industry standard.
Benchtop current sources in lab equipment — source measure units (SMUs) and precision current calibrators — use composite transistor topologies internally to maintain output accuracy across load and temperature. The same principle that makes a Wilson mirror work in a 5mm² chip works in a rackmount instrument.
What is a composite current source?
A composite current source is a circuit built from two or more transistors that work together to produce a stable, high-impedance current output. It outperforms simple single-transistor current sources in accuracy, temperature stability, and output impedance. In IC design, "CCS" also refers to the Composite Current Source timing model standard used in Liberty library files.
What is the difference between CCS and NLDM?
NLDM characterizes a cell's timing using lookup tables and treats the load as a fixed capacitor. CCS models the driver as a voltage- and time-dependent current source and splits receiver capacitance into C1/C2 components. CCS is significantly more accurate at advanced process nodes (≤28nm).
What is the difference between CCS and ECSM?
Both are improvements over NLDM, but they use different approaches. ECSM stores an "effective current" waveform in the Liberty file. CCS stores a full current surface — i(t,v) — making it more accurate for large-swing transitions and complex interconnect networks.
Can you apply KVL to a circuit with a current source?
Yes. KVL applies to all circuits regardless of whether they contain current sources or voltage sources. However, the voltage across a current source is not independently set — it is determined by the rest of the circuit. The current source "forces" a current; the circuit determines what voltage appears across its terminals.
Can a current source have a voltage across it?
Absolutely. A current source controls current, not voltage. Whatever voltage is needed to maintain that current through the circuit will appear across the current source terminals.
Is a current source AC or DC?
Current sources can be either. A DC current source provides a steady current (like a bias network in an op-amp). An AC current source provides a time-varying current — used in RF circuits, oscillators, and signal injection for testing.
Why is output impedance important in a current source?
An ideal current source has infinite output impedance — its output current doesn't change regardless of the load voltage. Real current sources have finite impedance, so their output current drifts as the load changes. Composite current sources achieve much higher output impedance than simple designs, which is why they're preferred in precision applications.
When should I use a composite current source instead of a simple current mirror?
Use a composite current source when accuracy matters — precision analog circuits, matched bias networks, or designs sensitive to temperature or supply variation. For non-critical applications, a simple two-transistor mirror is sufficient and uses less area. In IC timing, use CCS libraries when designing at 28nm or below.
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