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OUTLINE

  • Introduction

  • Why Your Simple Current Source Isn't Good Enough

  • How a Composite Current Source Fixes These Problems

  • The Trade-offs: When Simpler Is Better

  • The Other CCS: Why Your Timing Sign-Off Keeps Missing Silicon

  • Real Applications

  • Key Differences at a Glance

  • Key Takeaways

Composite Current Source: How to Build a Bias Network That Doesn't Drift

25 April 2026 42

Introduction

You're designing a low-noise audio preamp. You've picked your op-amp, your input stage topology, your feedback network. Then you hit the bias circuit: what feeds a stable reference current into your differential pair?


You could use a simple resistor from the supply. It's cheap and it's easy. But the moment your supply voltage shifts — say, your USB power dips slightly — your bias current shifts with it, and your carefully designed operating point drifts.


That's the problem a composite current source solves. Instead of relying on a single transistor to set your bias current, it combines two or more transistors in a feedback arrangement that keeps the current stable regardless of supply variation, temperature change, or transistor-to-transistor mismatch.


If you've been seeing "CCS" in Liberty files and wondering what it means in the context of chip design — I'll cover that too, because the term shows up in both analog circuit design and IC timing models, and understanding both gives you a fuller picture.

 

Why Your Simple Current Source Isn't Good Enough

The textbook current source is a single transistor with a fixed bias voltage applied to its base or gate. It sources a current that's approximately constant. The problem is the word "approximately."


A single-transistor current source has finite output impedance. As the voltage at its output changes — because of what the circuit around it is doing — the current changes too. If your preamp's power supply sags by 100mV during a transient, your simple bias current doesn't just stay the same. It drifts. For a design targeting 16-bit or 24-bit accuracy, this kind of drift is the difference between clean audio and distortion at the wrong moments.


Real transistors also drift with temperature. A single BJT's collector current changes by roughly -2mV/°C in its base-emitter voltage. That's not a huge number, but over a 40°C temperature range — the kind you see in equipment that warms up during use — it adds up to a meaningful shift in your bias point.


The third problem is transistor matching. In a current mirror — where you want two or more identical currents in different parts of your circuit — any mismatch between the transistors shows up directly as current error. At low current levels (microamps to tens of microamps), mismatch becomes the dominant error source. A simple mirror might give you ±5–10% matching. For a precision reference, that's not good enough.

 

How a Composite Current Source Fixes These Problems

The idea behind a composite current source is to add feedback. Instead of one transistor doing all the work, you add a second (or third) transistor that senses changes in the output current and corrects them.


The canonical example is the Wilson current mirror. Here's how it works in a BJT implementation:


You have three transistors. Q1 is the reference transistor — it sets the reference current based on the bias voltage you apply. Q2 is the output transistor — it mirrors the current from Q1 to the rest of your circuit. Q3 is the feedback element. If the output current through Q2 tries to drift — because the output voltage changed or temperature shifted — Q3 senses this through Q2's base drive and adjusts Q2's operation to compensate.


The result is a dramatic improvement in output impedance. A basic current mirror might give you 50–100kΩ of output impedance. A Wilson mirror can push that to several megohms — a 100× improvement in the same silicon area. Your bias current becomes much more independent of what the surrounding circuit is doing.


MOSFET-based composite structures work on the same principle. A cascode stacks two MOSFETs in series: the lower device sets the current, and the upper device (the cascode) keeps the lower transistor's drain voltage constant. This isolates the current from changes in the output voltage — which is exactly what you want for a stable bias.


For your audio preamp, this means your input stage's operating point stays where you put it. The noise floor doesn't wander. The distortion products stay consistent. You get the performance you designed for, not the performance that happens to occur at the current temperature.

 

The Trade-offs: When Simpler Is Better

Here's the honest part: composite current sources cost you something. Every additional transistor adds complexity, consumes more silicon area, and introduces more parasitic elements. For a simple LED driver or a non-critical bias network, a single-transistor current mirror is perfectly adequate. You get 80% of the benefit for 20% of the complexity.


The right answer depends on your accuracy requirement. If you're designing a 16-bit ADC reference that needs current stable to 0.01% over temperature, a Wilson mirror or cascode current source is worth the effort. If you're setting a bias point in a garden-variety audio amp where ±5% variation is inaudible, a simple two-transistor mirror is fine.


When you're building something like an audio preamp — where the bias network directly sets your input stage's operating point, which in turn determines your noise floor and distortion — the composite approach pays for itself in performance.

 

The Other CCS: Why Your Timing Sign-Off Keeps Missing Silicon

Now let's switch contexts. You're not building an audio preamp — you're verifying timing on a 28nm automotive SoC. You've run static timing analysis using NLDM libraries, everything passes, you tape out, and the first silicon comes back with setup violations on critical paths that your STA tool never flagged.

What happened?


At 28nm and below, interconnect resistance and capacitance become comparable to gate delay itself. A signal traveling across a metal wire experiences delay that's no longer negligible. NLDM's assumption — that the load is just a fixed capacitor — breaks down. The model treats your driver as a black box with a lookup table, but the reality is that the driver's behavior depends on the exact voltage waveform at the receiver, which depends on the RC network between them.


That's where CCS (Composite Current Source) timing models come in.

Instead of characterizing the driver with a single effective capacitance, CCS models the output as a time- and voltage-dependent current source — a full i(t, v) surface. It also splits the receiver input capacitance into two components: C1 (before the signal threshold crossing) and C2 (after). This split captures the Miller effect — the dynamic change in input capacitance depending on whether the signal is rising or falling.


The practical result: timing sign-off using CCS libraries correlates much more closely with actual silicon measurements than NLDM-based sign-off at advanced nodes. For a design that takes 18–24 months and hundreds of millions of dollars to tape out, using the wrong timing model is not a minor issue.


If you're designing on a ≤28nm process node — automotive SoC, high-speed SerDes, advanced mobile processor — your foundry and EDA toolchain will require CCS timing libraries. This isn't optional at advanced nodes.


For older nodes (≥65nm) or for learning purposes, NLDM is perfectly adequate. The model you use should match the accuracy your design requires.

 

Real Applications

Precision Analog Circuits

Composite current sources are the backbone of precision analog design. In an op-amp input stage, the differential pair needs matched tail currents — any mismatch becomes input offset voltage, which directly degrades precision. A Wilson mirror or cascode bias network keeps these currents matched across temperature and process variation.


For a 24-bit sigma-delta ADC reference current, composite current sources with laser-trimmed resistors are what make parts-per-million accuracy achievable. The reference current must hold stable to microamps across the full operating temperature range and for the lifetime of the product.


IC Timing Verification

Every major foundry — TSMC, Samsung, GlobalFoundries — provides CCS timing libraries for their ≤28nm process nodes. EDA platforms including Synopsys PrimeTime and Cadence Tempus consume these Liberty files directly for timing sign-off. If you're doing any serious chip design at advanced nodes, working with CCS libraries is a core skill.


Lab Instrumentation

Benchtop source measure units (SMUs) and precision current calibrators use composite transistor topologies internally to maintain output accuracy across load and temperature changes. The same physics that makes a Wilson mirror work on a chip works in a rackmount instrument — the principles scale across discrete and integrated implementations.

 

Key Differences at a Glance

NLDM treats the cell output as a lookup table driven by input transition and load capacitance. It works fine above 90nm, it's fast to compute, and library file sizes are manageable.

ECSM improves on NLDM by using an effective current waveform for the driver, but keeps the fixed-capacitance receiver model. It gains partial Miller effect coverage. File sizes are moderate, and accuracy improves to roughly ±5–8% across PVT corners.


CCS stores the full i(t, v) current surface for the driver and splits receiver capacitance into C1 and C2. It captures Miller effect properly and achieves ±1–3% accuracy at advanced nodes. The cost: library file sizes are 3–5× larger than NLDM, and characterization runtime is longer. At 28nm and below, this cost is unavoidable.


The rule of thumb: match your timing model to your process node. Above 65nm, NLDM is fine. Below 28nm, CCS is mandatory. In between, ECSM is a reasonable choice if CCS libraries aren't available from your foundry.

 

Key Takeaways

● A composite current source adds feedback transistors to keep output current stable against supply variation, temperature drift, and transistor mismatch. The result is much higher output impedance — often 100× higher than a simple current mirror.

● Use composite structures when accuracy matters: precision analog circuits, matched bias networks, or designs sensitive to temperature or supply variation. For non-critical applications, a simple mirror is sufficient and uses less silicon area.

● If you're designing on a ≤28nm process node, CCS timing libraries (the EDA model, not the circuit topology) are what your foundry and EDA tools expect for timing sign-off. NLDM is fine for learning and for mature process nodes.

● The right tool depends on your accuracy requirement. A Wilson mirror for your audio preamp's bias network is good engineering. Demanding CCS timing libraries for a 180nm LED driver is overengineering.


Whether you're working with electrons on a circuit board or timing arcs in a cell library, the core idea is the same: feedback stabilizes. Adding that second transistor — in any form — is what takes your current source from "approximately constant" to "reliably precise."




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