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TPS7H4001-SP
  • TPS7H4001-SP
  • TPS7H4001-SP
  • TPS7H4001-SP

TPS7H4001-SP

ACTIVE

Radiation-hardened, QMLV and QMLP, 3-V to 7-V input 18-A synchronous step-down converter

Texas Instruments TPS7H4001-SP Product Info

1 April 2026 1

Parameters

Rating

Space

Topology

Buck

Iout (max) (A)

18

Vin (max) (V)

7

Vin (min) (V)

3

Vout (max) (V)

6.65

Vout (min) (V)

0.604

Features

Enable, Frequency synchronization, Overcurrent protection, Power good, Prebias startup, Soft-start adjustable, Synchronous rectification, Tracking, UVLO adjustable

Control mode

current mode

Operating temperature range (°C)

-55 to 125

Iq (typ) (A)

0.004

Duty cycle (max) (%)

100

Package

CFP (HKY)-34-164.5158 mm² 21.59 x 7.62

Features

  • Radiation performance:
    • Radiation-hardness-assured up to TID 100 krad(Si)
    • SEL, SEB, and SEGR immune to LET = 75 MeV-cm 2/mg
    • SET and SEFI characterized up to LET = 75 MeV-cm 2/mg
  • Peak efficiency: 95.5% (V O = 1 V at 100 kHz)
  • Power rail: 3 V to 7 V on VIN
  • Flexible switching frequency options:
    • 100-kHz to 1-MHz adjustable internal oscillator
    • External sync capability: 100-kHz to 1-MHz
    • SYNC pins can be configured as 500-kHz clocks at 90° out of phase to parallel up to 4 devices
  • 0.6-V ±1.5% voltage reference over temperature, radiation, and line and load regulation for CDFP, KGD (known good die), and HTSSOP (QMLP) options
  • 0.6-V ±1.7% voltage reference over temperature, radiation, and line and load regulation for HTSSOP (SHP) option
  • Monotonic start-up into prebiased outputs
  • Adjustable slope compensation and soft-start
  • Adjustable input enable and power-good output for power sequencing
  • Radiation performance:
    • Radiation-hardness-assured up to TID 100 krad(Si)
    • SEL, SEB, and SEGR immune to LET = 75 MeV-cm 2/mg
    • SET and SEFI characterized up to LET = 75 MeV-cm 2/mg
  • Peak efficiency: 95.5% (V O = 1 V at 100 kHz)
  • Power rail: 3 V to 7 V on VIN
  • Flexible switching frequency options:
    • 100-kHz to 1-MHz adjustable internal oscillator
    • External sync capability: 100-kHz to 1-MHz
    • SYNC pins can be configured as 500-kHz clocks at 90° out of phase to parallel up to 4 devices
  • 0.6-V ±1.5% voltage reference over temperature, radiation, and line and load regulation for CDFP, KGD (known good die), and HTSSOP (QMLP) options
  • 0.6-V ±1.7% voltage reference over temperature, radiation, and line and load regulation for HTSSOP (SHP) option
  • Monotonic start-up into prebiased outputs
  • Adjustable slope compensation and soft-start
  • Adjustable input enable and power-good output for power sequencing

Description

The TPS7H4001-SP is a radiation-hardness-assured, 7-V, 18-A synchronous buck converter with integrated low-resistance high-side and low-side MOSFETs. High efficiency and reduced component count are achieved through current mode control.

The output voltage start-up ramp is controlled by the SS/TR pin which allows operation as either a stand alone power supply or in tracking situations. Power sequencing is possible by correctly configuring the enable and the power good pins. The TPS7H4001-SP can be configured in primary-secondary mode and with the SYNC2 pin, four devices can be configured in parallel without an external clock.

Cycle-by-cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current protection which prevents current runaway. Thermal shutdown disables the part when die temperature exceeds thermal limit.

The TPS7H4001-SP is a radiation-hardness-assured, 7-V, 18-A synchronous buck converter with integrated low-resistance high-side and low-side MOSFETs. High efficiency and reduced component count are achieved through current mode control.

The output voltage start-up ramp is controlled by the SS/TR pin which allows operation as either a stand alone power supply or in tracking situations. Power sequencing is possible by correctly configuring the enable and the power good pins. The TPS7H4001-SP can be configured in primary-secondary mode and with the SYNC2 pin, four devices can be configured in parallel without an external clock.

Cycle-by-cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current protection which prevents current runaway. Thermal shutdown disables the part when die temperature exceeds thermal limit.

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