0
ACTIVE
Technology family |
LVC |
Supply voltage (min) (V) |
1.65 |
Supply voltage (max) (V) |
3.6 |
Number of channels |
8 |
IOL (max) (mA) |
24 |
Supply current (max) (µA) |
10 |
IOH (max) (mA) |
-24 |
Input type |
Standard CMOS |
Output type |
3-State |
Features |
Balanced outputs, Very high speed (tpd 5-10ns) |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 125 |
SOIC (DW)-20-131.84 mm² 12.8 x 10.3
The SN54LVC541A octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC541A octal buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The LVC541A devices are ideal for driving bus lines or buffering memory address registers.
These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.
The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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