Texas Instruments SN74LVC2G02 Product Info

Parameters

Technology family	LVC
Number of channels	2
Supply voltage (min) (V)	1.65
Supply voltage (max) (V)	5.5
Inputs per channel	2
IOL (max) (mA)	32
IOH (max) (mA)	-32
Output type	Push-Pull
Input type	Standard CMOS
Features	Over-voltage tolerant Inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)
Data rate (max) (Mbps)	100
Rating	Catalog
Operating temperature range (°C)	-40 to 125

Package

DSBGA (YZP)-8-2.8125 mm² 2.25 x 1.25

Features

Available in the Texas Instruments
NanoFree™ package
Supports 5-V V_CC operation
Inputs accept voltages to 5.5 V
Max t_pd of 4.9 ns at 3.3 V
Low power consumption, 10-µA Max I_CC
±24-mA Output drive at 3.3 V
Typical V_OLP (output ground bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (output V_OH undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
I_off supports partial-power-down mode operation
Latch-up performance exceeds 100 mA er JESD 78, class II
ESD protection exceeds JESD 22
- 2000-V Human-body model (A114-A)
- 1000-V Charged-device model (C101)

Available in the Texas Instruments
NanoFree™ package
Supports 5-V V_CC operation
Inputs accept voltages to 5.5 V
Max t_pd of 4.9 ns at 3.3 V
Low power consumption, 10-µA Max I_CC
±24-mA Output drive at 3.3 V
Typical V_OLP (output ground bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (output V_OH undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
I_off supports partial-power-down mode operation
Latch-up performance exceeds 100 mA er JESD 78, class II
ESD protection exceeds JESD 22
- 2000-V Human-body model (A114-A)
- 1000-V Charged-device model (C101)

Description

This dual 2-input positive-NOR gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC2G02 device performs the Boolean function Y = A + B or Y = A × B in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This dual 2-input positive-NOR gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC2G02 device performs the Boolean function Y = A + B or Y = A × B in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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All In One Distributor

SN74LVC2G02

2-ch, 2-input, 1.65-V to 5.5-V NOR gates

Texas Instruments SN74LVC2G02 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS All In One Distributor

SN74LVC2G02

2-ch, 2-input, 1.65-V to 5.5-V NOR gates

Texas Instruments SN74LVC2G02 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS
All In One Distributor