0
Technology family |
LVC |
Supply voltage (min) (V) |
1.65 |
Supply voltage (max) (V) |
5.5 |
Number of channels |
1 |
Inputs per channel |
2 |
IOL (max) (mA) |
32 |
IOH (max) (mA) |
0 |
Input type |
Standard CMOS |
Output type |
Open-drain |
Features |
Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) |
Data rate (max) (Mbps) |
100 |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 125 |
SOT-23 (DBV)-5-8.12 mm² 2.9 x 2.8
The SN74LVC1G38 device is designed for 1.65-V to 5.5-V VCC operation.
This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function Y = A × B or Y = A + B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
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