0
SN74LVC1G38
  • SN74LVC1G38
  • SN74LVC1G38
  • SN74LVC1G38
  • SN74LVC1G38
  • SN74LVC1G38
  • SN74LVC1G38
  • SN74LVC1G38

SN74LVC1G38

ACTIVE

Single 2-input, 1.65-V to 5.5-V NAND gate with open-drain outputs

Texas Instruments SN74LVC1G38 Product Info

1 April 2026 0

Parameters

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

1

Inputs per channel

2

IOL (max) (mA)

32

IOH (max) (mA)

0

Input type

Standard CMOS

Output type

Open-drain

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Package

SOT-23 (DBV)-5-8.12 mm² 2.9 x 2.8

Features

  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 200-V Machine model (A115-A)
    • 1000-V Charged-device model (C101)
  • Available in the Texas Instruments
    NanoStar™ and NanoFree™ Packages
  • Supports 5-V VCC operation
  • Inputs accept voltages to 5.5 V
  • Supports down translation to VCC
  • Maximum tpd of 4.5 ns at 3.3 V
  • Low power consumption, 10-µA maximum ICC
  • ±24-mA Output drive at 3.3 V
  • Ioff Supports partial-power-down mode and back-drive protection
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 200-V Machine model (A115-A)
    • 1000-V Charged-device model (C101)
  • Available in the Texas Instruments
    NanoStar™ and NanoFree™ Packages
  • Supports 5-V VCC operation
  • Inputs accept voltages to 5.5 V
  • Supports down translation to VCC
  • Maximum tpd of 4.5 ns at 3.3 V
  • Low power consumption, 10-µA maximum ICC
  • ±24-mA Output drive at 3.3 V
  • Ioff Supports partial-power-down mode and back-drive protection

Description

The SN74LVC1G38 device is designed for 1.65-V to 5.5-V VCC operation.

This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function Y = A × B or Y = A + B in positive logic.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

The SN74LVC1G38 device is designed for 1.65-V to 5.5-V VCC operation.

This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function Y = A × B or Y = A + B in positive logic.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Subscribe to Welllinkchips !
Your Name
* Email
Submit a request