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SN74LVC1G123
  • SN74LVC1G123
  • SN74LVC1G123
  • SN74LVC1G123

SN74LVC1G123

ACTIVE

Single retriggerable monostable multivibrator with Schmitt-trigger inputs

Texas Instruments SN74LVC1G123 Product Info

1 April 2026 1

Parameters

Number of channels

1

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Technology family

LVC

Input type

Schmitt-Trigger

Output type

Push-Pull

Supply current (µA)

20

IOL (max) (mA)

32

IOH (max) (mA)

-32

Features

Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff)

Operating temperature range (°C)

-40 to 125

Rating

Catalog

Package

DSBGA (YZP)-8-2.8125 mm² 2.25 x 1.25

Features

  • Available in the Texas Instruments NanoFree™ Package
  • Supports 5V VCC Operation
  • Inputs Accept Voltages to 5.5V
  • Max tpd of 8ns at 3.3V
  • Supports Mixed-Mode Voltage Operation on All Ports
  • Supports Down Translation to VCC
  • Schmitt-Trigger Circuitry on A and B Inputs for Slow Input Transition Rates
  • Edge Triggered From Active-High or Active-Low Gated Logic Inputs
  • Retriggerable for Very Long Output Pulses, Up to 100% Duty Cycle
  • Overriding Clear Terminates Output Pulse
  • Glitch-Free Power-Up Reset on Outputs
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000V Human-Body Model (A114-A)
    • 200V Machine Model (A115-A)
    • 1000V Charged-Device Model (C101)
  • Available in the Texas Instruments NanoFree™ Package
  • Supports 5V VCC Operation
  • Inputs Accept Voltages to 5.5V
  • Max tpd of 8ns at 3.3V
  • Supports Mixed-Mode Voltage Operation on All Ports
  • Supports Down Translation to VCC
  • Schmitt-Trigger Circuitry on A and B Inputs for Slow Input Transition Rates
  • Edge Triggered From Active-High or Active-Low Gated Logic Inputs
  • Retriggerable for Very Long Output Pulses, Up to 100% Duty Cycle
  • Overriding Clear Terminates Output Pulse
  • Glitch-Free Power-Up Reset on Outputs
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000V Human-Body Model (A114-A)
    • 200V Machine Model (A115-A)
    • 1000V Charged-Device Model (C101)

Description

The SN74LVC1G123 device is a single retriggerable monostable multivibrator designed for 1.65V to 5.5V VCC operation.

This monostable multivibrator features output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear ( CLR) input goes high.

The output pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. The output pulse duration also can be reduced by taking CLR low.

Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. The A and B inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition rates with jitter-free triggering at the outputs.

The SN74LVC1G123 device is a single retriggerable monostable multivibrator designed for 1.65V to 5.5V VCC operation.

This monostable multivibrator features output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear ( CLR) input goes high.

The output pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. The output pulse duration also can be reduced by taking CLR low.

Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. The A and B inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition rates with jitter-free triggering at the outputs.

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