Texas Instruments F28M35H52C-Q1 Product Info

Parameters

CPU	1 C28, 1 Cortex-M3
Frequency (MHz)	100, 150
Flash memory (kByte)	1024
RAM (kByte)	136
ADC type	2 12-bit
Total processing (MIPS)	250
Features	32-bit CPU timers, Dual security zones, FPU32, VCU, Watchdog timer
UART	6
CAN (#)	2
Sigma-delta filter	0
PWM (Ch)	24
Number of ADC channels	12
Direct memory access (Ch)	1 32-ch DMA, 1 6-Ch DMA
SPI	5
QEP	3
USB	Yes
Operating temperature range (°C)	-40 to 125
Rating	Automotive
Communication interface	CAN, I2C, SPI, UART
Operating system	FreeRTOS
Hardware accelerators	Floating point unit
Nonvolatile memory (kByte)	1024
Number of GPIOs	74
Number of I2Cs	2
Edge AI enabled	No

Package

HTQFP (RFP)-144-484 mm² 22 x 22

Features

Master Subsystem — Arm Cortex-M3
- Up to 100 MHz
- Embedded memory
  - Up to 512KB of flash (ECC)
  - Up to 32KB of RAM (ECC or parity)
  - Up to 64KB of shared RAM
  - 2KB of IPC Message RAM
- Five Universal Asynchronous Receiver/Transmitters (UARTs)
- Four Synchronous Serial Interfaces (SSIs) and a Serial Peripheral Interface (SPI)
- Two Inter-integrated Circuits (I2Cs)
- Universal Serial Bus On-the-Go (USB-OTG) + PHY
- 10/100 ENET 1588 MII
- Two Controller Area Network, D_CAN, modules (pin-bootable)
- 32-channel Micro Direct Memory Access (µDMA)
- Dual security zones (128-bit password per zone)
- External Peripheral Interface (EPI)
- Micro Cyclic Redundancy Check (µCRC) module
- Four general-purpose timers
- Two watchdog timer modules
- Three external interrupts
- Endianness: little endian
Clocking
- On-chip crystal oscillator and external clock input
- Dynamic Phase-Locked Loop (PLL) ratio changes supported
1.2-V digital, 1.8-V analog, 3.3-V I/O design
Interprocessor Communications (IPC)
- 32 handshaking channels
- Four channels generate IPC interrupts
- Can be used to coordinate transfer of data through IPC Message RAMs
Up to 74 individually programmable, multiplexed General-Purpose Input/Output (GPIO) pins
- Glitch-free I/Os
Control Subsystem — TMS320C28x 32-bit CPU
- Up to 150 MHz
- C28x core hardware built-in self-test
- Embedded memory
  - Up to 512KB of flash (ECC)
  - Up to 36KB of RAM (ECC or parity)
  - Up to 64KB of shared RAM
  - 2KB of IPC Message RAM
- IEEE-754 single-precision Floating-Point Unit (FPU)
- Viterbi, Complex Math, CRC Unit (VCU)
- Serial Communications Interface (SCI)
- SPI
- I2C
- 6-channel Direct Memory Access (DMA)
- Nine Enhanced Pulse Width Modulator (ePWM) modules
  - 18 outputs (16 high-resolution)
- Six 32-bit Enhanced Capture (eCAP) modules
- Three 32-bit Enhanced Quadrature Encoder Pulse (eQEP) modules
- Multichannel Buffered Serial Port (McBSP)
- EPI
- One security zone (128-bit password)
- Three 32-bit timers
- Endianness: little endian
Analog Subsystem
- Dual 12-bit Analog-to-Digital Converters (ADCs)
- Up to 2.88 MSPS
- Up to 20 channels
- Four Sample-and-Hold (S/H) circuits
- Up to six comparators with 10-bit Digital-to-Analog Converter (DAC)
Package
- 144-Pin RFP PowerPAD™ Thermally Enhanced Thin Quad Flatpack (HTQFP)
Temperature options:
- T: –40°C to 105°C Junction
- S: –40°C to 125°C Junction
- Q: –40°C to 125°C Free-Air (AEC Q100 qualification for automotive applications)

Master Subsystem — Arm Cortex-M3
- Up to 100 MHz
- Embedded memory
  - Up to 512KB of flash (ECC)
  - Up to 32KB of RAM (ECC or parity)
  - Up to 64KB of shared RAM
  - 2KB of IPC Message RAM
- Five Universal Asynchronous Receiver/Transmitters (UARTs)
- Four Synchronous Serial Interfaces (SSIs) and a Serial Peripheral Interface (SPI)
- Two Inter-integrated Circuits (I2Cs)
- Universal Serial Bus On-the-Go (USB-OTG) + PHY
- 10/100 ENET 1588 MII
- Two Controller Area Network, D_CAN, modules (pin-bootable)
- 32-channel Micro Direct Memory Access (µDMA)
- Dual security zones (128-bit password per zone)
- External Peripheral Interface (EPI)
- Micro Cyclic Redundancy Check (µCRC) module
- Four general-purpose timers
- Two watchdog timer modules
- Three external interrupts
- Endianness: little endian
Clocking
- On-chip crystal oscillator and external clock input
- Dynamic Phase-Locked Loop (PLL) ratio changes supported
1.2-V digital, 1.8-V analog, 3.3-V I/O design
Interprocessor Communications (IPC)
- 32 handshaking channels
- Four channels generate IPC interrupts
- Can be used to coordinate transfer of data through IPC Message RAMs
Up to 74 individually programmable, multiplexed General-Purpose Input/Output (GPIO) pins
- Glitch-free I/Os
Control Subsystem — TMS320C28x 32-bit CPU
- Up to 150 MHz
- C28x core hardware built-in self-test
- Embedded memory
  - Up to 512KB of flash (ECC)
  - Up to 36KB of RAM (ECC or parity)
  - Up to 64KB of shared RAM
  - 2KB of IPC Message RAM
- IEEE-754 single-precision Floating-Point Unit (FPU)
- Viterbi, Complex Math, CRC Unit (VCU)
- Serial Communications Interface (SCI)
- SPI
- I2C
- 6-channel Direct Memory Access (DMA)
- Nine Enhanced Pulse Width Modulator (ePWM) modules
  - 18 outputs (16 high-resolution)
- Six 32-bit Enhanced Capture (eCAP) modules
- Three 32-bit Enhanced Quadrature Encoder Pulse (eQEP) modules
- Multichannel Buffered Serial Port (McBSP)
- EPI
- One security zone (128-bit password)
- Three 32-bit timers
- Endianness: little endian
Analog Subsystem
- Dual 12-bit Analog-to-Digital Converters (ADCs)
- Up to 2.88 MSPS
- Up to 20 channels
- Four Sample-and-Hold (S/H) circuits
- Up to six comparators with 10-bit Digital-to-Analog Converter (DAC)
Package
- 144-Pin RFP PowerPAD™ Thermally Enhanced Thin Quad Flatpack (HTQFP)
Temperature options:
- T: –40°C to 105°C Junction
- S: –40°C to 125°C Junction
- Q: –40°C to 125°C Free-Air (AEC Q100 qualification for automotive applications)

Description

The Concerto family is a multicore system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M35x family of devices is the first series in the Concerto family.

The communications subsystem is based on the industry-standard 32-bit Arm Cortex-M3 CPU and features a wide variety of communication peripherals, including Ethernet 1588, USB OTG with PHY, Controller Area Network (CAN), UART, SSI, I2C, and an external interface.

The real-time control subsystem is based on TI’s industry-leading proprietary 32-bit C28x floating-point CPU and features the most flexible and high-precision control peripherals, including ePWMs with fault protection, and encoders and captures—all as implemented by TI’s TMS320C2000™ Entry performance MCUs and Premium performance MCUs. In addition, the C28-CPU has been enhanced with the addition of the VCU instruction accelerator that implements efficient Viterbi, Complex Arithmetic, 16-bit FFTs, and CRC algorithms.

A high-speed analog subsystem and supplementary RAM memory is shared, along with on-chip voltage regulation and redundant clocking circuitry. Safety considerations also include Error Correction Code (ECC), parity, and code secure memory, as well as documentation to assist with system-level industrial safety certification.

The Concerto family is a multicore system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M35x family of devices is the first series in the Concerto family.

The communications subsystem is based on the industry-standard 32-bit Arm Cortex-M3 CPU and features a wide variety of communication peripherals, including Ethernet 1588, USB OTG with PHY, Controller Area Network (CAN), UART, SSI, I2C, and an external interface.

The real-time control subsystem is based on TI’s industry-leading proprietary 32-bit C28x floating-point CPU and features the most flexible and high-precision control peripherals, including ePWMs with fault protection, and encoders and captures—all as implemented by TI’s TMS320C2000™ Entry performance MCUs and Premium performance MCUs. In addition, the C28-CPU has been enhanced with the addition of the VCU instruction accelerator that implements efficient Viterbi, Complex Arithmetic, 16-bit FFTs, and CRC algorithms.

A high-speed analog subsystem and supplementary RAM memory is shared, along with on-chip voltage regulation and redundant clocking circuitry. Safety considerations also include Error Correction Code (ECC), parity, and code secure memory, as well as documentation to assist with system-level industrial safety certification.

ELECTRONIC COMPONENTS
All In One Distributor

F28M35H52C-Q1

Automotive C2000™ dual-core 32-bit MCU with 250 MIPS, 1024 KB flash

Texas Instruments F28M35H52C-Q1 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS All In One Distributor

F28M35H52C-Q1

Automotive C2000™ dual-core 32-bit MCU with 250 MIPS, 1024 KB flash

Texas Instruments F28M35H52C-Q1 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS
All In One Distributor