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Technology family |
LV-A |
Number of channels |
3 |
Supply voltage (min) (V) |
2 |
Supply voltage (max) (V) |
5.5 |
Inputs per channel |
3 |
IOL (max) (mA) |
12 |
IOH (max) (mA) |
-12 |
Output type |
Push-Pull |
Input type |
Standard CMOS |
Features |
Over-voltage tolerant Inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) |
Data rate (max) (Mbps) |
70 |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 85 |
SOIC (D)-14-51.9 mm² 8.65 x 6
These triple 3-input positive-NOR gates are designed for 2-V to 5.5-V V CC operation.
The SN74LV27A devices perform the Boolean function Y = A + B + C in positive logic.
These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.