0
Bits (#) |
18 |
Data rate (max) (Mbps) |
300 |
Topology |
Open drain, Push-Pull |
Output drive capability (max) (mA) |
100000 |
Vin (min) (V) |
4.5 |
Vin (max) (V) |
5.5 |
Applications |
GTL |
Features |
Single supply |
Technology family |
FB |
Supply current (max) (mA) |
120 |
Rating |
Catalog |
Operating temperature range (°C) |
0 to 70 |
HLQFP (PCA)-100-256 mm² 16 x 16
The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.
The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output enables (OEB and OEB) are provided for the B outputs. When OEB is low, OEB is high, or VCC is less than 2.1 V, the B port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.
BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
BG VCC and BG GND are the supply inputs for the bias generator.