0
ACTIVE
Protocols |
Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART |
Configuration |
1:1 SPST |
Number of channels |
4 |
Bandwidth (MHz) |
200 |
Supply voltage (max) (V) |
3.6 |
Supply voltage (min) (V) |
2.3 |
Ron (typ) (mΩ) |
5000 |
Input/output voltage (min) (V) |
0 |
Input/output voltage (max) (V) |
3.6 |
ESD HBM (typ) (kV) |
2 |
Operating temperature range (°C) |
-40 to 125 |
Input/output continuous current (max) (mA) |
128 |
COFF (typ) (pF) |
7 |
CON (typ) (pF) |
2.5 |
OFF-state leakage current (max) (µA) |
1 |
Ron (max) (mΩ) |
40000 |
VIH (min) (V) |
2 |
VIL (max) (V) |
0.8 |
Rating |
Automotive |
TSSOP (PW)-14-32 mm² 5 x 6.4
The SN74CBTLV3126-Q1 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE) input is low.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The SN74CBTLV3126-Q1 device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull down resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
