Texas Instruments SN74AUP1G126 Product Info

Parameters

Technology family	AUP
Supply voltage (min) (V)	0.8
Supply voltage (max) (V)	3.6
Number of channels	1
IOL (max) (mA)	4
Supply current (max) (µA)	0.9
IOH (max) (mA)	-4
Input type	Standard CMOS
Output type	3-State
Features	Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)
Rating	Catalog
Operating temperature range (°C)	-40 to 85

Package

DSBGA (YFP)-6-1.4000000000000001 mm² 1 x 1.4000000000000001

Features

Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22−
- 2000-V Human-Body Model
  (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Available in the Texas Instruments NanoStar™ Package
Low Static-Power Consumption
(I_CC = 0.9 µA Maximum)
Low Dynamic-Power Consumption
(C_pd = 4 pF Typical at 3.3 V)
Low Input Capacitance (C_i = 1.5 pF Typical)
Low Noise – Overshoot and Undershoot
<10% of V_CC
Input-Disable Feature Allows Floating Input Conditions
I_off Supports Partial-Power-Down Mode Operation
Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input
Wide Operating V_CC Range of 0.8 V to 3.6 V
Optimized for 3.3-V Operation
3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
t_pd = 4.6 ns Maximum at 3.3 V
Suitable for Point-to-Point Applications

Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22−
- 2000-V Human-Body Model
  (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Available in the Texas Instruments NanoStar™ Package
Low Static-Power Consumption
(I_CC = 0.9 µA Maximum)
Low Dynamic-Power Consumption
(C_pd = 4 pF Typical at 3.3 V)
Low Input Capacitance (C_i = 1.5 pF Typical)
Low Noise – Overshoot and Undershoot
<10% of V_CC
Input-Disable Feature Allows Floating Input Conditions
I_off Supports Partial-Power-Down Mode Operation
Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input
Wide Operating V_CC Range of 0.8 V to 3.6 V
Optimized for 3.3-V Operation
3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
t_pd = 4.6 ns Maximum at 3.3 V
Suitable for Point-to-Point Applications

Description

The AUP family is TIs premier solution to the industrys low-power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire V_CC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family and Excellent Signal Integrity ).

This bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low. This device has the input-disable feature, which allows floating input signals.

To assure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The AUP family is TIs premier solution to the industrys low-power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire V_CC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family and Excellent Signal Integrity ).

This bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low. This device has the input-disable feature, which allows floating input signals.

To assure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

ELECTRONIC COMPONENTS
All In One Distributor

SN74AUP1G126

Single 0.8-V to 3.6-V low power buffer with 3-state outputs

Texas Instruments SN74AUP1G126 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS All In One Distributor

SN74AUP1G126

Single 0.8-V to 3.6-V low power buffer with 3-state outputs

Texas Instruments SN74AUP1G126 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS
All In One Distributor