Texas Instruments SN74AUP1G08 Product Info

Parameters

Technology family	AUP
Supply voltage (min) (V)	0.8
Supply voltage (max) (V)	3.6
Number of channels	1
Inputs per channel	2
IOL (max) (mA)	4
IOH (max) (mA)	-4
Input type	Standard CMOS
Output type	Push-Pull
Features	Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)
Data rate (max) (Mbps)	100
Rating	Catalog
Operating temperature range (°C)	-40 to 85

Package

DSBGA (YFP)-6-1.4000000000000001 mm² 1 x 1.4000000000000001

Features

Available in the Ultra Small 0.64mm2 Package (DPW) With 0.5mm Pitch
Low Static-Power Consumption: ICC = 0.9µA Maximum
Low Dynamic-Power Consumption: Cpd = 4.3pF Typical at 3.3V
Low Input Capacitance: Ci = 1.5pF Typical
Low Noise: Overshoot and Undershoot <10% of VCC
Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
Schmitt-Trigger Action Allows Slow Input Transition and Better Switching Noise Immunity at the Input (Vhys = 250 mV Typical at 3.3V)
Wide Operating VCC Range of 0.8V to 3.6V
Optimized for 3.3V Operation
3.6V I/O Tolerant to Support Mixed-Mode Signal Operation
tpd = 4.3ns Maximum at 3.3V
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000V Human-Body Model (A114-B, Class II)
- 1000V Charged-Device Model (C101)

Available in the Ultra Small 0.64mm2 Package (DPW) With 0.5mm Pitch
Low Static-Power Consumption: ICC = 0.9µA Maximum
Low Dynamic-Power Consumption: Cpd = 4.3pF Typical at 3.3V
Low Input Capacitance: Ci = 1.5pF Typical
Low Noise: Overshoot and Undershoot <10% of VCC
Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
Schmitt-Trigger Action Allows Slow Input Transition and Better Switching Noise Immunity at the Input (Vhys = 250 mV Typical at 3.3V)
Wide Operating VCC Range of 0.8V to 3.6V
Optimized for 3.3V Operation
3.6V I/O Tolerant to Support Mixed-Mode Signal Operation
tpd = 4.3ns Maximum at 3.3V
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000V Human-Body Model (A114-B, Class II)
- 1000V Charged-Device Model (C101)

Description

This single 2-input positive-AND gate is designed for 0.8V to 3.6V VCC operation and performs the Boolean function Y = A • B or Y = /A + /B in positive logic.

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SN74AUP1G08

1-ch, 2-input 0.8-V to 3.6-V low power (< 1uA) AND gate

Texas Instruments SN74AUP1G08 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS All In One Distributor

SN74AUP1G08

1-ch, 2-input 0.8-V to 3.6-V low power (< 1uA) AND gate

Texas Instruments SN74AUP1G08 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS
All In One Distributor