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SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125
  • SN74AHCT125

SN74AHCT125

ACTIVE

4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Texas Instruments SN74AHCT125 Product Info

1 April 2026 1

Parameters

Technology family

AHCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

4

IOL (max) (mA)

8

Supply current (max) (µA)

20

IOH (max) (mA)

-8

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Package

PDIP (N)-14-181.42 mm² 19.3 x 9.4

Features

  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250mA per JESD 17
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250mA per JESD 17

Description

The ’AHCT125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.

For the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The ’AHCT125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.

For the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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