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LSF0102
  • LSF0102
  • LSF0102
  • LSF0102
  • LSF0102
  • LSF0102
  • LSF0102
  • LSF0102
  • LSF0102
  • LSF0102
  • LSF0102
  • LSF0102

LSF0102

ACTIVE

Dual bidirectional multivoltage level translator

Texas Instruments LSF0102 Product Info

1 April 2026 1

Parameters

Bits (#)

2

Data rate (max) (Mbps)

200

Topology

Open drain, Push-Pull

Direction control (typ)

Auto-direction

Vin (min) (V)

0.95

Vin (max) (V)

4.9

Vout (min) (V)

1.8

Vout (max) (V)

5.5

Applications

GPIO, I2C, MDIO, SMBus, UART

Features

Output enable

Prop delay (ns)

1.2

Technology family

LSF

Supply current (max) (mA)

0.0015

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Package

DSBGA (YZT)-8-1.9404 mm² 1.98 x 0.98

Features

  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100MHz up translation and greater than 100MHz down translation at ≤ 30pF capacitive load and up To 40MHz up or down translation at 50pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.95V ↔ 1.8/2.5/3.3/5V
    • 1.2V ↔ 1.8/2.5/3.3/5V
    • 1.8V ↔ 2.5/3.3/5V
    • 2.5V ↔ 3.3/5V
    • 3.3V ↔ 5V
  • Low standby current
  • 5V tolerance I/O port to support TTL
  • Low RON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100mA per JESD 17
  • –40°C to 125°C operating temperature range
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100MHz up translation and greater than 100MHz down translation at ≤ 30pF capacitive load and up To 40MHz up or down translation at 50pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.95V ↔ 1.8/2.5/3.3/5V
    • 1.2V ↔ 1.8/2.5/3.3/5V
    • 1.8V ↔ 2.5/3.3/5V
    • 2.5V ↔ 3.3/5V
    • 3.3V ↔ 5V
  • Low standby current
  • 5V tolerance I/O port to support TTL
  • Low RON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100mA per JESD 17
  • –40°C to 125°C operating temperature range

Description

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I2C, SMBus, and so forth). The LSF family of devices supports up to 100MHz up translation and greater than 100MHz down translation at ≤ 30pF capacitive load and up to 40MHz up or down translation at 50pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels which makes it very flexible.

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I2C, SMBus, and so forth). The LSF family of devices supports up to 100MHz up translation and greater than 100MHz down translation at ≤ 30pF capacitive load and up to 40MHz up or down translation at 50pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels which makes it very flexible.

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