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Technology family |
AHC |
Supply voltage (min) (V) |
2 |
Supply voltage (max) (V) |
5.5 |
Number of channels |
4 |
IOL (max) (mA) |
8 |
Supply current (max) (µA) |
40 |
IOH (max) (mA) |
-8 |
Input type |
Standard CMOS |
Output type |
3-State |
Features |
Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) |
Rating |
Automotive |
Operating temperature range (°C) |
-40 to 125 |
SOIC (D)-14-51.9 mm² 8.65 x 6
The SN74AHC125-Q1 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.
To put the device in the high-impedance state during power up or power down, tie OE to VCC through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.