0
Supply voltage (min) (V) |
4.5 |
Supply voltage (max) (V) |
5.5 |
Number of channels |
18 |
IOL (max) (mA) |
64 |
IOH (max) (mA) |
-32 |
Input type |
TTL-Compatible CMOS |
Output type |
Push-Pull |
Features |
Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) |
Technology family |
ABT |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 85 |
SSOP (DL)-56-190.647 mm² 18.42 x 10.35
Widebus, EPIC-IIB, and UBT are trademarks of Texas Instruments Incorporated.
These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled modes.
Data flow in each direction is controlled by output-enable (
and
), latch-enable (LEAB and LEBA),
and clock (CLKAB and CLKBA) inputs. The clock can be controlled by
the clock-enable (
and
) inputs. For A-to-B data flow, the
device operates in the transparent mode when LEAB is high. When LEAB
is low, the A data is latched if CLKAB is held at a high or low logic
level. If LEAB is low, the A data is stored in the latch/flip-flop on
the low-to-high transition of CLKAB. Output enable
is active low. When
is low, the outputs are active.
When
is high, the
outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B, but uses
, LEBA, CLKBA, and
.
To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
driver.
The SN54ABT16601 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16601 is characterized for operation from -40°C to 85°C.