0
Number of channels |
8 |
Technology family |
FCT |
Supply voltage (min) (V) |
4.75 |
Supply voltage (max) (V) |
5.25 |
Input type |
TTL, TTL-Compatible CMOS |
Output type |
CMOS, Push-Pull |
Clock frequency (max) (MHz) |
100 |
IOL (max) (mA) |
64 |
IOH (max) (mA) |
-32 |
Supply current (max) (µA) |
200 |
Features |
Partial power down (Ioff), Very high speed (tpd 5-10ns) |
Operating temperature range (°C) |
-40 to 85 |
Rating |
Catalog |
SOIC (DW)-20-131.84 mm² 12.8 x 10.3
The x92FCT377T devices have eight triggered D-type flip-flops with individual data (D) inputs. The common buffered clock (CP) inputs load all flip-flops simultaneously when the clock-enable (CE) input is low. The register is fully edge triggered. The state of each D input at one setup time before the low-to-high clock transition is transferred to the corresponding flip-flop output (O). CE must be stable only one setup time prior to the low-to-high clock transition for predictable operation.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.