Texas Instruments CDC351 Product Info

Parameters

Number of outputs	10
Core supply voltage (V)	3.3
Output supply voltage (V)	3.3
Output skew (ps)	0.6
Operating temperature range (°C)	-40 to 85
Rating	Catalog
Output type	LVTTL
Input type	LVTTL

Package

SOIC (DW)-24-159.65 mm² 15.5 x 10.3

Features

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
LVTTL-Compatible Inputs and Outputs
Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Distributes One Clock Input to Ten Outputs
Distributed V_CC and Ground Pins Reduce Switching Noise
High-Drive Outputs (-32-mA I_OH, 32-mA I_OL)
State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages

EPIC-IIB is a trademark of Texas Instruments Incorporated.

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
LVTTL-Compatible Inputs and Outputs
Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Distributes One Clock Input to Ten Outputs
Distributed V_CC and Ground Pins Reduce Switching Noise
High-Drive Outputs (-32-mA I_OH, 32-mA I_OL)
State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages

EPIC-IIB is a trademark of Texas Instruments Incorporated.

Description

The CDC351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance state. The CDC351 operates at nominal 3.3-V V_CC.

The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.

The CDC351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance state. The CDC351 operates at nominal 3.3-V V_CC.

The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.

ELECTRONIC COMPONENTS
All In One Distributor

CDC351

1-line to 10-line 3.3-V clock driver with tri-state outputs

Texas Instruments CDC351 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS All In One Distributor

CDC351

1-line to 10-line 3.3-V clock driver with tri-state outputs

Texas Instruments CDC351 Product Info

Parameters

Package

Features

Description

SUBMITTED SUCCESSFULLY！

ELECTRONIC COMPONENTS
All In One Distributor