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CD74HC112
  • CD74HC112
  • CD74HC112
  • CD74HC112
  • CD74HC112
  • CD74HC112

CD74HC112

ACTIVE

High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

Texas Instruments CD74HC112 Product Info

1 April 2026 1

Parameters

Number of channels

2

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Input type

LVTTL/CMOS

Output type

Push-Pull

Clock frequency (MHz)

24

Supply current (max) (µA)

40

IOL (max) (mA)

6

IOH (max) (mA)

-6

Features

Balanced outputs, Clear, High speed (tpd 10-50ns), Negative edge triggered, Positive input clamp diode, Preset

Operating temperature range (°C)

-55 to 125

Rating

Catalog

Package

PDIP (N)-16-181.42 mm² 19.3 x 9.4

Features

CD74HC112

Description

CD74HC112:High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset.Package:PDIP (N)-16-181.42 mm² 19.3 x 9.4

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