FCCSP (ALT)-266-1728 mm² 12 x 144

The AWR2944P/AWR2E44P is a "Performance" expansion to the AWR2944 portfolio with enhanced RF and compute performance to meet NCAP + Automated Driving requirements. The AWR2944-ECO/AWR2E44-ECO and AWR2944LC/AWR2E44LC are mainstream and feature optimized variants respectively in the family to enable customers with a scalable portfolio between P, ECO, and LC devices in the family. The AWR2944P/AWR2E44P/AWR2944-ECO/AWR2E44-ECO/AWR2944LC/AWR2E44LC is also a single-chip mmWave sensor composed of a FMCW transceiver, capable of operation in the 76- to 81-GHz band, radar data processing elements, and peripherals for in-vehicle networking. The radar sensor is built with TI’s low-power 45-nm RFCMOS process with designs to enhance RF and compute performance enabling unprecedented levels of integration in a small form factor and minimal BOM. The AWR2944P/AWR2E44P/AWR2944-ECO/AWR2E44-ECO/AWR2944LC/AWR2E44LC device is designed for low-power, self-monitored, ultra-accurate radar systems in the automotive space.

The AWR2E44P/AWR2E44-ECO/AWR2E44LC variant provides customers with an remarkable Launch on Package (LOP) antenna feature which facilitates the attachment of antennas directly on to the package. LOP technology enables loss-less transmission of signals from the AWR2E44P/AWR2E44-ECO/AWR2E44LC chip to the antenna via holes in the PCB & launches on the bottom of the chip. The chip and antenna are directly soldered to the PCB enabling low cost PCB material to be used instead of expensive high-frequency material.

TI’s low-power 45nm RFCMOS process enables a monolithic implementation of a 4 TX, 4 RX system with integrated PLL, VCO, mixer, and baseband ADC. Integrated in the DSP subsystem (DSS), is TI’s high-performance C66x DSP for radar signal processing. The device includes a Radio Processor Subsystem (RSS), which is responsible for radar front-end configuration, control, and calibration. Within the Main Subsystem (MSS), the device implements a user-programmable Arm Cortex-R5F processor allowing for custom control and automotive interface applications. The hardware accelerator block (HWA 2.1) supplements the DSS and MSS by offloading common radar processing such as FFT, constant false alarm rate (CFAR), scaling, and compression. This saves MIPS on the DSS and MSS, opening up resources for custom applications and higher-level algorithms.

A Hardware Security Module (HSM) is also provisioned in the device (available for only secure part variants). The HSM consists of a programmable Arm Cortex-M4 core and the necessary infrastructure to provide a secure zone of operation within the device.

The AWR2944P/AWR2E44P/AWR2944-ECO/AWR2E44-ECO/AWR2944LC/AWR2E44LC also incorporates a Cortex-M4 processor to configure and control the Hardware Accelerator module (HWA 2.1).

Simple programming model changes can enable a wide variety of sensor implementation (Short, Mid, Long) with the possibility of dynamic reconfiguration for implementing a multimode sensor.

Additionally, the AWR2944P/AWR2E44P/AWR2944-ECO/AWR2E44-ECO/AWR2944LC/AWR2E44LC is provided as a complete platform device including TI hardware and software reference designs, software drivers, sample configurations, API guides, and user documentation.