0
Sample rate (max) (Msps) |
500, 1000 |
Resolution (Bits) |
14 |
Number of input channels |
4 |
Interface type |
JESD204B |
Analog input BW (MHz) |
1000 |
Features |
High Performance |
Rating |
Catalog |
Peak-to-peak input voltage range (V) |
1.1 |
Power consumption (typ) (mW) |
2500 |
Architecture |
Pipeline |
SNR (dB) |
69 |
ENOB (Bits) |
11.6 |
SFDR (dB) |
86 |
Operating temperature range (°C) |
-40 to 85 |
Input buffer |
Yes |
VQFNP (RMP)-72-100 mm² 10 x 10
The ADS54J64 device is a quad-channel, 14-bit,
1-GSPS, analog-to-digital converter (ADC) offering wide-bandwidth, 2x oversampling and high SNR. The ADS54J64 supports a JESD204B serial interface with data rates up to 10 Gbps with one lane per channel. The buffered analog input provides uniform impedance across a wide frequency range and minimizes sample-and-hold glitch energy. The ADS54J64 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. The digital signal processing block includes complex mixers followed by low-pass filters with decimate-by-2 and -4 options supporting up to a 200-MHz receive bandwidth. The ADS54J64 also supports a 14-bit, 500-MSPS output in DDC bypass mode.
A four-lane JESD204B interface simplifies connectivity, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 14-bit data from each channel.