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AT90USB647
  • AT90USB647
  • AT90USB647

AT90USB647

In Production

The high-performance, low-power Microchip 8-bit AVR RISC-based microcontroller combines 64KB ISP flash memory with read-while-write capabilities, 2KB EEPROM, 4KB SRAM, 48 general purpose I/O lines, 32 general purpose working registers, real time counter, 4 flexible timer/counters with compare modes and PWM, USART, byte oriented 2-wire serial interface, USB 2.0 low-speed and full-speed On-The-Go (OTG) host/device, an 8-channel 10-bit A/D converter with optional differential input stage with programmable gain, programmable watchdog timer with internal oscillator, SPI serial port, JTAG (IEEE 1149.1 compliant) interface for on-chip debugging, and six software selectable power saving modes. By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching ...

Microchip Technology AT90USB647 Product Info

16 April 2026 0

Parameters

Program Memory Size (KB)

64

RAM

4

Data EEPROM (bytes)

2048

Pin Count

64

Operation Voltage Max.(V)

5.5

Operation Voltage Min.(V)

2.7

ADC Resolution Max

10

ADC Channels

8

Zero Cross Detect

False

Number of Comparators

1

SPI

2

I2C

1

Stand alone PWM

9

Low Power

No

Numerically Controlled Oscillator (NCO)

0

Data Signal Modulator (DSM)

0

Description

The high-performance, low-power Microchip 8-bit AVR RISC-based microcontroller combines 64KB ISP flash memory with read-while-write capabilities, 2KB EEPROM, 4KB SRAM, 48 general purpose I/O lines, 32 general purpose working registers, real time counter, 4 flexible timer/counters with compare modes and PWM, USART, byte oriented 2-wire serial interface, USB 2.0 low-speed and full-speed On-The-Go (OTG) host/device, an 8-channel 10-bit A/D converter with optional differential input stage with programmable gain, programmable watchdog timer with internal oscillator, SPI serial port, JTAG (IEEE 1149.1 compliant) interface for on-chip debugging, and six software selectable power saving modes.

By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per MHz, balancing power consumption and processor speed.

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