The STM32F373RCT6 sits at the top of the STM32F373 value line in terms of pin count and I/O availability. Packaged in a 64-pin LQFP with a 10 mm × 10 mm footprint, it pairs a 72 MHz Arm Cortex-M4 core (with FPU and DSP instructions) with 256 KB of Flash and 32 KB of SRAM, while exposing 52 general-purpose I/O pins—a meaningful step up from the 36 I/O found on 48-pin variants in the same family. For designs that need to drive multiple communication buses, sample several analog channels, and still retain headroom for control signals, the RCT6 offers a balanced entry point into ST’s mixed-signal F3 portfolio.

The computational engine is the familiar Cortex-M4F, running at up to 72 MHz and delivering 1.25 DMIPS/MHz. The single-precision floating-point unit is not a cosmetic addition: it allows sensor-fusion algorithms, digital filters, and control-loop math to execute without the overhead of software emulation, which is particularly relevant when the on-chip Sigma-Delta ADCs are streaming data continuously. A memory protection unit (MPU) is included, enabling basic isolation between tasks in a bare-metal scheduler or a lightweight RTOS. The embedded trace macrocell (ETM) supports instruction-level debugging without consuming GPIO pins.

The 256 KB Flash / 32 KB SRAM combination is the largest memory configuration available in the 48/64-pin F373 variants, giving firmware room for protocol stacks (USB, CAN) alongside application logic and calibration routines. A CRC calculation unit adds hardware-assisted integrity checking for stored parameters or communication payloads.

The defining feature of the STM32F373 line is the trio of 16-bit Sigma-Delta ADCs. On the RCT6, these converters are fully available, supporting up to 21 single-ended or 11 differential input channels with a separate analog supply spanning 2.2 V to 3.6 V. Unlike a successive-approximation register (SAR) converter, the SDADC uses oversampling and noise shaping to push quantization noise out of the band of interest, yielding excellent linearity and effective resolution for low-frequency signals such as temperature, pressure, and biopotential measurements.

A separate 12-bit SAR ADC (1.0 μs conversion time, up to 16 channels) handles faster, lower-resolution sampling tasks in parallel, so the SDADCs remain dedicated to precision channels. Three 12-bit DAC outputs and two rail-to-rail comparators with programmable inputs and outputs complete the analog front-end, enabling closed-loop sensor excitation or threshold-based interrupt generation without external components.

Table 1 summarizes the RCT6 analog configuration.

The 52 I/O pins of the LQFP64 package are what separate the RCT6 from its 48-pin siblings. All I/Os are mappable to external interrupt vectors, and up to 45 are 5 V tolerant—a practical advantage when interfacing with legacy industrial sensors or 5 V logic without level shifting. A 12-channel DMA controller offloads data movement from the CPU, which is especially useful for continuously transferring SDADC results into SRAM while the core services communication peripherals.

The connectivity set is comprehensive for a mixed-signal MCU at this tier: one CAN 2.0B Active interface, USB 2.0 full-speed device, three USARTs (supporting LIN, IrDA, ISO/IEC 7816, and auto-baud), three SPIs with muxed I2S, two Fast Mode Plus I²Cs, and an HDMI-CEC bus interface. The presence of CAN alongside USB makes the RCT6 suitable for gateway-style nodes that bridge a local sensor bus to a host or vehicle network.

Timer resources include two 32-bit timers, three 16-bit timers with up to four IC/OC/PWM channels, two additional 16-bit timers, four general-purpose 16-bit timers, and three basic timers dedicated to DAC triggering—17 timers in total. This density supports multi-axis PWM control, input capture for frequency measurement, and synchronized ADC/DAC sequencing.

Within the F373 family, the RCT6 distinguishes itself from the CBT6 and CCT6 primarily through package and I/O count rather than core analog capability. The 48-pin CBT6 and CCT6 both provide 36 I/O; the RCT6’s LQFP64 raises that to 52, a 44% increase. That delta matters when a design must route CAN, USB, multiple USARTs, and a parallel display or memory interface simultaneously. The RCT6 also retains the full 256 KB Flash / 32 KB SRAM configuration, matching the CCT6’s memory while offering the additional pins.

The selection decision therefore reduces to a single question: does the application require more than 36 I/O? If the answer is yes, the RCT6 is the natural F373 choice; if not, the CCT6 delivers the same memory and analog resources in a smaller 7 mm × 7 mm footprint.

Typical applications for the RCT6 cluster around precision multi-channel sensing with moderate connectivity demands: industrial process transmitters that combine RTD or thermocouple inputs with a CAN or 4–20 mA loop output; portable medical instruments requiring ECG or respiration impedance measurement alongside a USB data link; and multi-sensor environmental monitors where the SDADCs handle slow-varying analog quantities while the SAR ADC and comparators manage faster supervisory signals.

Development follows the standard STM32Cube ecosystem. STM32CubeIDE provides a free Eclipse-based toolchain with GCC, GDB, and ST-LINK debug support, while the STM32CubeF3 package supplies HAL and low-level drivers for every on-chip peripheral, including dedicated SDADC configuration routines. The STM32F373C-EVAL board exposes the LQFP64 footprint and the full analog front-end, making it a practical starting point for SDADC evaluation before committing to a custom PCB. For teams already invested in the F3 line, the RCT6 is pin-compatible within the 64-pin R-variant and offers a straightforward migration path from smaller Flash R8/RB parts when firmware outgrows 64 or 128 KB.