Not every precision sensing design needs a large memory map or dozens of GPIOs. The STM32F373CBT6 targets a different optimization point: it retains the full mixed-signal peripheral set of the F373 family—including three 16-bit Sigma-Delta ADCs—while scaling Flash to 128 KB and RAM to 24 KB inside a compact 48-pin LQFP with a 7 mm × 7 mm body. The result is a microcontroller that brings 16-bit-class analog acquisition to cost-sensitive, space-constrained products without forcing a compromise on converter architecture.

The CBT6’s memory configuration sits between the entry-level 64 KB C8 variant and the 256 KB CCT6/RCT6 parts. For many sensor-interface and control applications, 128 KB of Flash is sufficient to host a real-time operating system kernel, a communication stack, and application-specific calibration or filtering code. The 24 KB SRAM provides enough working memory for double-buffered SDADC acquisitions and DMA descriptors, even when a USB or CAN stack is active.

Crucially, the reduction in memory relative to the 256 KB parts does not come with a reduction in analog capability. The CBT6 still carries the same three SDADC blocks, the 12-bit SAR ADC, three DACs, and two comparators found on higher-memory 48-pin variants. The trade-off is purely one of storage and I/O count, not of mixed-signal fidelity.

The presence of Sigma-Delta converters on a low-cost 48-pin MCU is the CBT6’s most consequential characteristic. These 16-bit ADCs use a modulator and digital decimation filter to achieve high effective resolution on low-bandwidth signals. Because the quantization noise is shaped toward higher frequencies and then removed by the digital filter, the SDADC delivers excellent linearity and a simpler anti-aliasing filter requirement compared with a SAR converter of similar nominal resolution. On the CBT6, the three SDADCs can be synchronized, enabling simultaneous sampling of multiple sensor channels—a requirement in power metering, three-phase sensing, or multi-axis bridge configurations.

The digital filter is programmable, allowing the user to trade output data rate against resolution. This flexibility is valuable in applications where the signal bandwidth is known and modest (tens to hundreds of hertz), such as temperature, pressure, or strain measurement. The accompanying 12-bit SAR ADC remains available for faster, lower-precision auxiliary channels, and the three 12-bit DACs can provide excitation or offset compensation without external op-amps in many bridge-sensor circuits.

With 36 I/O pins, the CBT6 demands a more deliberate approach to peripheral allocation than the 64-pin RCT6. The pinout nonetheless accommodates the core mixed-signal use case: a set of SDADC differential inputs, a handful of SAR ADC channels, I²C or SPI for a local sensor hub, one USART for host communication, and PWM outputs from the 16-bit timers for heater or actuator control. The 5 V-tolerant capability on many pins simplifies interfacing with industrial sensors that swing above the 3.3 V rail.

Table 1 contrasts the CBT6’s resource envelope with the two other 48-pin F373 variants, the C8 (64 KB) and CCT6 (256 KB).

The table makes the CBT6’s positioning clear: it is the middle-memory option that preserves the full analog feature set while offering double the Flash of the C8 and a 50% larger SRAM buffer. For designs that have outgrown 64 KB but do not yet require the 32 KB SRAM of the CCT6, the CBT6 avoids paying for unused memory.

The CBT6 is particularly well matched to loop-powered industrial transmitters and compact sensor modules. A typical configuration uses two SDADC channels for a differential bridge measurement (pressure or load), one SDADC channel for a temperature compensation input (RTD or thermistor), and the SAR ADC for supply-voltage monitoring. The DAC can drive a 4–20 mA loop or provide a ratiometric reference, while a USART or I²C port handles configuration and calibration commands. In this role, the 128 KB Flash is ample for linearization tables, HART modem firmware, or a Modbus stack, and the 24 KB SRAM supports the necessary buffering without external memory.

Portable medical and fitness devices form a second natural cluster. ECG front-ends benefit from the SDADC’s low noise and high linearity at the low frequencies characteristic of biopotential signals; the 128 KB memory budget accommodates basic QRS detection and communication firmware, and the 48-pin package keeps the PCB small enough for wrist-worn or patch-style form factors. Building automation sensors—CO₂ transmitters, differential pressure monitors, and thermal comfort probes—also align well with the CBT6’s combination of precision analog, modest compute, and compact footprint.

Development for the CBT6 uses the same STM32CubeF3 firmware package and STM32CubeIDE toolchain as the rest of the F373 family. The SDADC driver in the HAL library exposes the modulator clock selection, digital filter configuration, and calibration routines, reducing the bring-up effort for precision channels. Because the CBT6 shares the LQFP48 pinout with the C8 and CCT6, a single PCB can be populated with different memory variants during prototyping and production ramp, allowing firmware development to begin on the CBT6 and migrate to the CCT6 later if code size grows.

The 24 KB SRAM is worth planning around carefully: enabling a USB device stack, a filesystem, and multiple SDADC DMA buffers simultaneously can approach the limit. Early profiling of stack and heap usage, combined with the MPU’s ability to catch overruns, helps avoid late-stage surprises. With that discipline, the CBT6 delivers a mixed-signal capability that is difficult to match in its price and package class.