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MAX36210
  • MAX36210

MAX36210

PRODUCTION

Security Supervisor with SP800-90A TRNG, Tamper Detection, and Cryptography Small Footprint, Secure Memory with Advanced Security Protection

Analog Devices MAX36210 Product Info

10 February 2026 7

Features

  • Low-Power Security Supervisor Enables Cost Effective Security Solution
    • 1KB Battery-Backed NV SRAM with High-Speed Erase on its AES-256 Encryption Key
    • 4KB Flash Data Storage
    • Battery-Backed Tamper Circuit and RTC
    • Low-Current Battery-Backup Operation
    • Operates from Single 3.3V Supply
  • Security Features Facilitate System-Level Protection
    • Tamper Detection with Fast Wipe Key/Data Destruction
    • Hardware Accelerators for AES (128/192/256), 3DES, RSA (1024/2048/4096), ECDSA (p256/p384/p521), SHA (1/224/256/384/512)
    • True Hardware Random-Number Generator (NIST SP800-90A)
    • Temperature, Voltage and Die Shield Sensors to Detect Attacks
    • 2 Pairs of External Sensor Tamper Detects
    • Time Stamp for Tamper Event
    • Encrypted NV SRAM Data Transfer
    • Authentication with Connected Host
    • 104-Bit Unique Serial Number
  • Integrated Peripherals Allows for Easy Integration into Applications
    • Programmable Alarm with External Output
    • CPU Supervisor
    • SPI, I²C, UART Interfaces
    • 4 GPIO Pins

Part details & applications

As Internet connectivity and greater intelligence get integrated into more products, these products can also boast more potential points of vulnerability if left unprotected. Embedded security technologies, such as security supervisors, can safeguard these designs from hacking, counterfeiting, and other security breaches faced by Internet of things (IoT) designs. The MAX36210 is a low-power security supervisor designed for fiscal memory, internet security and IP protection applications that require certificate-based or other public key cryptography schemes. The device also incorporates a sophisticated security mechanism to protect sensitive information in secure memory; two pairs of external sensor input and environmental monitors (temperature, voltage, and die shield sensors) erase the on-chip secure memory when an attack condition is detected.

SPI, I²C, and UART interfaces (one each) are provided for secure, flexible communication to external system nodes. Device control and configuration are performed through an SPI, I²C, or UART interface.

The MAX36210 includes 1KB of battery-backed nonvolatile SRAM that is always protected by dynamic sensors and environmental sensors. This memory is provided for secure data storage where data is automatically encrypted/decrypted by a AES-256 master key upon access. When there is a tamper event, it causes the device to instantly wipe the AES-256 master key as well as other sensitive contents. Tamper source and time of tamper are recorded in battery-backed registers. In addition, the MAX36210 enters into a reset state until the source of the tamper is removed. With the combination of the above features and tamper detection circuit, the MAX36210 supports active tamper resistance, which is required by FIPS140 and PCI standards.

The MAX36210 also includes 4KB of flash for storing less critical information that the content needs to remain intact upon

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