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ADV7682
  • ADV7682

ADV7682

NOT RECOMMENDED FOR NEW DESIGNS

APIX2 Transmitter with Dual Port HDMI and HDCP Support

Analog Devices ADV7682 Product Info

10 February 2026 7

Features

  • APIX2 transmitter with HDCP
    High-bandwidth Digital Content Protection (HDCP) 1.4 support with internal preprogrammed HDCP keys
    Dual-channel encryption engine supports simple daisy-chain implementation for remote displays
  • Independent encryption of video and audio
  • Up to 3000 Mbps sustained downstream link bandwidth
  • ITU-R BT.656 Support
    8-bit ITU-R BT.656 Interface with embedded timing
    720p Supported at 148.5 MHz Clock rate
  • Supports for two independent video streams and two synchronous audio streams
  • Up to 187.5 Mbps upstream link bandwidth
  • Audio support
  • HDMI audio extraction support
    Supports multiplexed (TDM) I2S audio I/O
  • General
    Dual interrupt controller with APIX link status reporting
    Internal EDID RAM
  • Qualified for automotive applications
  • See data sheet for additional features

Part details & applications

The ADV7682 is a high quality, dual input HDMI® and single input ITU-R BT.656 receiver with an APIX®2 transmitter, compatible with APIX® and APIX2 receiver technology from Inova Semiconductors. It incorporates dual port HDMI receivers that support all mandatory 3D TV formats defined in HDMI. The ITU-R BT.656 8-bit receiver supports resolutions up to 720p when using a 148.5 MHz input clock. A standard ITU-R BT.656 input clock of 27 MHz is also supported. When using the ITU-R BT.656 interface, only embedded timing is supported. There is no provision for using separate horizontal sync (Hsync) or vertical sync (Vsync) inputs. The ADV7682 also supports DVI or HDMI resolutions up to a 107 MHz pixel clock at 24 BPP or a 140 MHz pixel clock at 18 BPP. However, the input format configuration across both video ports must be managed to ensure that the maximum total video payload for the APIX2 interface is not exceeded.

ADV7682 integrates a CEC controller that supports the capability discovery and control (CDC) feature.

The ADV7682 has an audio output port for the audio data extracted from any one of the HDMI input streams. The HDMI receiver also has an advanced mute controller that prevents audible extraneous noise (pops and clicks) in the audio output. Additionally, the ADV7682 can be set to output TDM serial audio, which allows transmission of four multiplexed stereo serial audio channels on a single audio output interface port.

The following HDMI source audio formats are accessible as outputs from the ADV7682:

  • A stream from the audio serializer (two audio channels).
  • A TDM stream from the audio serializer (eight audio channels, time multiplexed). The maximum audio bit rate is 48 kHz.
  • A stream from the audio serializer (two uncompressed channels or N compressed channels, for example, AC3).
  • An external master clock (MCLK

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