0
The ADV7481 is an integrated video decoder and combined HDMI®/MHL® receiver. It is targeted at connectivity enabled head units requiring a wired, uncompressed digital audio/video link from smartphones and other consumer electronics devices to support streaming and integration of cloud-based multimedia content and applications into an automotive infotainment system.
The ADV7481 MHL 2.1 capable receiver supports a maximum pixel clock frequency of 75 MHz, allowing resolutions up to 720p/1080i at 60 Hz in 24-bit mode. The ADV7481 features a link control bus (CBUS) that handles the link layer, translation layer, CBUS electrical discovery, and display data channel (DDC) commands. The implementation of the MHL sideband channel (MSC) commands by the system processor can be handled either by the I2C bus, or via a dedicated serial peripheral interface (SPI) bus. A dedicated interrupt pin (INTRQ3) is available to indicate that events related to CBUS have occurred.
The ADV7481 also features an enable pin (VBUS_EN) to dynamically enable or disable the output of a voltage regulator, which provides a 5 V voltage bus (VBUS) signal to the MHL source.
The ADV7481 HDMI capable receiver supports a maximum pixel clock frequency of 162 MHz, allowing HDTV formats up to 1080p, and display resolutions up to UXGA (1600 × 1200 at 60 Hz). The device integrates a consumer electronics control (CEC) controller that supports the capability discovery and control (CDC) feature. The HDMI input port has dedicated 5 V detect and Hot Plug™ assert pins.
The HDMI/MHL receiver includes an adaptive transition minimized differential signaling (TMDS) equalizer that ensures robust operation of the interface with long cables.
The ADV7481 single receiver port is capable of accepting both HDMI and MHL electrical signals. Automatic detection between HDMI and MHL is achieved by using cable impedance detection through the CD_SENSE pin.
<