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ADV7480
  • ADV7480
  • ADV7480

ADV7480

PRODUCTION

Dual Mode HDMI/MHL Receiver

Analog Devices ADV7480 Product Info

10 February 2026 6

Features

  • Mobile High-Definition Link (MHL) capable receiver
    • High-bandwidth Digital Content Protection (HDCP) authentication and decryption support
    • 75 MHz maximum pixel clock frequency, allowing HDTV formats up to 720p/1080i at 60 Hz
  • High-Definition Multimedia Interface (HDMI) capable receiver
    • HDCP authentication and decryption support
    • 162 MHz maximum pixel clock frequency, allowing HDTV formats up to 1080p and display resolutions up to UXGA (1600 × 1200 at 60 Hz)
  • Component video processor
    • Any-to-any 3 × 3 color space conversion (CSC) matrix
    • Contrast, brightness, hue, saturation video adjustment
    • Timing adjustments controls for horizontal sync (HS)/vertical sync (VS)/data enable (DE) timing

  • Serial digital audio output interface
    • HDMI/MHL audio extraction support
    • Advanced audio muting feature
    • I2S-compatible, left justified and right justified audio output modes
    • 8-channel TDM output mode available
  • Mobile Industry Processor Interface (MIPI) Camera Serial Interface 2 (CSI-2) transmitter
    • 4-lane transmitter with 4 lanes, 2 lanes, and 1 lane muxing options for HDMI/MHL/digital input port sources
  • 8-bit digital input/output port
  • General
    • 2-wire serial microprocessor unit (MPU) interface (I2C compatible)
    • −40°C to +85°C temperature grade
    • 100-ball, 9 mm × 9 mm, RoHS-compliant CSP_BGA package
    • Qualified for automotive applications
  • See data sheet for additional features

Part details & applications

The ADV7480 is a combined HDMI®/MHL® receiver targeted at connectivity enabled head units requiring a wired, uncompressed digital audio/video link from smartphones and other consumer electronics devices to support streaming and integration of cloud-based multimedia content and applications into an automotive infotainment system.

The ADV7480 MHL 2.1 capable receiver supports a maximum pixel clock frequency of 75 MHz, allowing resolutions up to 720p/1080i at 60 Hz in 24-bit mode. The ADV7480 features a link control bus (CBUS) that handles the link layer, translation layer, CBUS electrical discovery, and display data channel (DDC) commands. The implementation of the MHL sideband channel (MSC) commands by the system processor can be handled either by the I2C bus, or via a dedicated serial peripheral interface (SPI) bus. A dedicated interrupt pin (INTRQ3) is available to indicate that events related to CBUS have occurred.

The ADV7480 also features an enable pin (VBUS_EN) to dynamically enable or disable the output of a voltage regulator, which provides a 5 V voltage bus (VBUS) signal to the MHL source.

The ADV7480 HDMI capable receiver supports a maximum pixel clock frequency of 162 MHz, allowing HDTV formats up to 1080p, and display resolutions up to UXGA (1600 × 1200 at 60 Hz). The device integrates a consumer electronics control (CEC) controller that supports the capability discovery and control (CDC) feature. The HDMI input port has dedicated 5 V detect and Hot Plug™ assert pins.

The HDMI/MHL receiver includes an adaptive transition minimized differential signaling (TMDS) equalizer that ensures robust operation of the interface with long cables. The ADV7480 single receiver port is capable of accepting both HDMI and MHL electrical signals. Automatic detection between HDMI and MHL is achieved by using cable impedance detection through the CD_SENSE pin.

The ADV7480 contains a componen