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ADRV9022
  • ADRV9022
  • ADRV9022
  • ADRV9022

ADRV9022

RECOMMENDED FOR NEW DESIGNS

Integrated, Quad RF Transceiver with Observation Path ADRV9022 Wideband Transceiver IC

Analog Devices ADRV9022 Product Info

10 February 2026 6

Features

  • 4 differential transmitters
  • 4 differential receivers
  • 2 observation receivers with 2 inputs each
  • Single band 4T4R or dual band 2T2R operation
  • Fully integrated DPD adaptation engine for power amplifier linearization
  • Crest factor reduction engine
  • LO tuning range: 75 MHz to 6000 MHz
  • RF range: 10 MHz to 6100 MHz1
  • Maximum receiver bandwidth: 200 MHz
  • Maximum transmitter large signal bandwidth: 200 MHz
  • Maximum transmitter synthesis bandwidth: 450 MHz
  • Maximum observation receiver bandwidth: 450 MHz
  • Fully integrated independent fractional-N RF synthesizers
  • Fully integrated clock synthesizer
  • Dual external LO inputs supporting operation up to 6 GHz
  • Multichip phase synchronization for all LOs and baseband clocks
  • Support for TDD and FDD applications
  • 24.33 Gbps JESD204B/JESD204C digital interface
  • Simplifying thermal and power consumption challenges
  • 6.89 W power consumption for the TDD mode, DFE enabled use case with 200 MHz occupied bandwidth

Part details & applications

The ADRV9022 is a highly integrated, RF agile transceiver that offers four independently controlled transmitters and receivers, dedicated observation receiver inputs for monitoring each transmitter channel, integrated synthesizers, and digital signal processing that delivers a complete transceiver solution. This device meets the performance needs of cellular infrastructure, including small cells, macro 3G/4G/5G systems, and massive, multiple in and multiple out (MIMO) base stations.

The receiver subsystem consists of four wide bandwidth, direct conversion receivers with excellent dynamic range. The transmitters use direct conversion modulation, enabling low noise operation and power efficiency. Two wide bandwidth, time shared observation receivers with dual inputs monitor the transmitter outputs.

The transceiver integrates automatic and manual attenuation control, DC offset correction, quadrature error correction (QEC), and digital filtering, removing the need for these in the digital baseband. Additional integrated functions include analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose inputs and outputs (GPIOs) for flexible digital control.

To ensure high RF performance, the device includes five fully integrated phase-locked loops (PLLs). Two for high-performance, low power, fractional-N RF synthesizers, one for an independent local oscillator (LO) mode for the observation receiver, one for the converter and digital circuits, and one for the serial interface clock.

Please see the Data Sheet for the full description.

APPLICATIONS

  • Tactical communications, phased array radar, and electronic warfare
  • Wireless test and measurement
  • Portable instruments
  • TDD and FDD applications

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