0
Configuration |
2:1 SPDT |
Number of channels |
4 |
Power supply voltage - single (V) |
5, 12, 16, 20, 36, 44 |
Power supply voltage - dual (V) |
+/-10, +/-15, +/-18, +/-22, +/-5 |
Protocols |
Analog |
Ron (typ) (Ω) |
3.5 |
CON (typ) (pF) |
76 |
ON-state leakage current (max) (µA) |
0.008 |
Supply current (typ) (µA) |
45 |
Bandwidth (MHz) |
100 |
Operating temperature range (°C) |
-40 to 125 |
Features |
1.8-V compatible control inputs, Break-before-make, Fail-safe logic, Integrated pulldown resistor on logic pin |
Input/output continuous current (max) (A) |
0.4 |
Rating |
Catalog |
Drain supply voltage (max) (V) |
44 |
Supply voltage (max) (V) |
44 |
Negative rail supply voltage (max) (V) |
-44 |
TSSOP (PW)-20-41.6 mm² 6.5 x 6.4
The TMUX7234 is a complementary metal-oxide semiconductor (CMOS) multiplexer with latch-up immunity. The TMUX7234 contains four independently controlled SPDT switches with an EN pin to enable or disable all four channels. The device supports single supply (4.5 V to 44 V), dual supplies (±4.5 V to ±22 V), or asymmetric supplies (such as VDD = 12 V, VSS = –5 V). The TMUX7234 supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from VSS to VDD.
All logic control inputs support logic levels from 1.8 V to VDD, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage.
The TMUX72xx family provides latch-up immunity, preventing undesirable high current events between parasitic structures within the device typically caused by overvoltage events. A latch-up condition typically continues until the power supply rails are turned off and can lead to device failure. The latch-up immunity feature allows the TMUX72xx family of switches and multiplexers to be used in harsh environments.