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Technology family |
LVC |
Supply voltage (min) (V) |
1.65 |
Supply voltage (max) (V) |
5.5 |
Number of channels |
2 |
Inputs per channel |
2 |
IOL (max) (mA) |
32 |
IOH (max) (mA) |
-32 |
Input type |
Standard CMOS |
Output type |
Push-Pull |
Features |
Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) |
Data rate (max) (Mbps) |
100 |
Rating |
Automotive |
Operating temperature range (°C) |
-40 to 125 |
SSOP (DCT)-8-11.8 mm² 2.95 x 4
This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G08-Q1 performs the Boolean function Y = A • B or Y = /A + /B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.