0
ACTIVE
Technology family |
LVC |
Supply voltage (min) (V) |
1.65 |
Supply voltage (max) (V) |
5.5 |
Number of channels |
1 |
Inputs per channel |
1 |
IOL (max) (mA) |
32 |
IOH (max) (mA) |
-32 |
Input type |
Standard CMOS |
Output type |
Push-Pull |
Features |
Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) |
Data rate (max) (Mbps) |
100 |
Rating |
HiRel Enhanced Product |
Operating temperature range (°C) |
-55 to 125 |
SOT-23 (DBV)-5-8.12 mm² 2.9 x 2.8
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G00 performs the Boolean function Y = A B or Y = A + B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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