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SN74LVC10A
  • SN74LVC10A
  • SN74LVC10A
  • SN74LVC10A
  • SN74LVC10A
  • SN74LVC10A
  • SN74LVC10A
  • SN74LVC10A
  • SN74LVC10A
  • SN74LVC10A

SN74LVC10A

ACTIVE

Three-channel, three-input, 1.65V to 3.6V NAND gates

Texas Instruments SN74LVC10A Product Info

1 April 2026 0

Parameters

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

3

Inputs per channel

3

IOL (max) (mA)

24

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Package

SOIC (D)-14-51.9 mm² 8.65 x 6

Features

  • Operates from 1.65V to 3.6V
  • Specified from –40°C to 85°C and –40°C to 125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.9ns at 3.3V
  • Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250 mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
  • Operates from 1.65V to 3.6V
  • Specified from –40°C to 85°C and –40°C to 125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.9ns at 3.3V
  • Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250 mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)

Description

This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.

This triple 3-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.

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