0
Number of channels |
8 |
Technology family |
LVC |
Supply voltage (min) (V) |
2 |
Supply voltage (max) (V) |
3.6 |
Input type |
Standard CMOS |
Output type |
3-State |
Clock frequency (max) (MHz) |
100 |
IOL (max) (mA) |
24 |
IOH (max) (mA) |
-24 |
Supply current (max) (µA) |
10 |
Features |
Balanced outputs, Flow-through pinout, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) |
Operating temperature range (°C) |
-55 to 125 |
Rating |
Military |
CDIP (J)-20-167.464 mm² 24.2 x 6.92
The SN54LVC573A octal transparent D-type latch is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC573A octal transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers.