0
ACTIVE
Architecture |
Voltage FB |
Number of channels |
1 |
Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) |
2.7 |
Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) |
5.5 |
GBW (typ) (MHz) |
120 |
BW at Acl (MHz) |
80 |
Acl, min spec gain (V/V) |
1.1 |
Slew rate (typ) (V/µs) |
115 |
Vn at flatband (typ) (nV√Hz) |
2.5 |
Vn at 1 kHz (typ) (nV√Hz) |
3.2 |
Iq per channel (typ) (mA) |
2 |
Vos (offset voltage at 25°C) (max) (mV) |
0.1 |
Rail-to-rail |
In to V-, Out |
Features |
Adjustable BW/IQ/IOUT, C-Load Drive, Shutdown |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 125 |
CMRR (typ) (dB) |
115 |
Input bias current (max) (pA) |
4000000 |
Offset drift (typ) (µV/°C) |
0.5 |
Iout (typ) (mA) |
100 |
2nd harmonic (dBc) |
80 |
3rd harmonic (dBc) |
80 |
Frequency of harmonic distortion measurement (MHz) |
1 |
SOT-23 (DBV)-6-8.12 mm² 2.9 x 2.8
The OPAx625 family of operational amplifiers are excellent 16-bit and 18-bit, SAR ADC drivers that are high precision with low THD and noise allow for a unique power-scalable solution. This family of devices is fully characterized and specified with a 16-bit settling time of 280 ns that enables a true 16-bit effective number of bits (ENOB). Along with a high dc precision of only 100 µV offset voltage, a wide gain-bandwidth product of 120 MHz, a low wideband noise of 2.5 nV/√Hz, this family is optimized for driving high-throughput, high-resolution SAR ADCs, such as the ADS88xx family of SAR ADCs.
The OPAx625 features two operating modes: high-drive and low-power. In the innovative low-power mode, the OPAx625 tracks the input signal allowing the OPAx625 to transition from low-power mode to high-drive mode at 16-bit ENOB within 170 ns.
The OPAx625 family is available in 6-pin SOT and 10-pin VSSOP packages and is specified for operation from –40°C to +125°C.
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
