Product
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LMK02000
  • LMK02000
  • LMK02000
  • LMK02000
  • LMK02000

LMK02000

ACTIVE

1 to 800-MHz, precision clock distributor with integrated PLL and 3 LVDS / 5 LVPECL outputs

Texas Instruments LMK02000 Product Info

1 April 2026 0

Parameters

Number of outputs

8

Output type

LVDS

Output frequency (max) (MHz)

800

Core supply voltage (V)

3.3

Output supply voltage (V)

3.3

Input type

LVCMOS, LVPECL

Operating temperature range (°C)

-40 to 85

Features

Integrated integer-N PLL, uWire

Rating

Catalog

Package

WQFN (RHS)-48-49 mm² 7 x 7

Features

  • 20 fs Additive Jitter
  • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz
  • Clock Output Frequency Range of 1 to 800 MHz
  • 3 LVDS and 5 LVPECL Clock Outputs
  • Dedicated Divider and Delay Blocks on Each Clock Output
  • Pin Compatible Family of Clocking Devices
  • 3.15 to 3.45 V Operation
  • Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
  • 20 fs Additive Jitter
  • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz
  • Clock Output Frequency Range of 1 to 800 MHz
  • 3 LVDS and 5 LVPECL Clock Outputs
  • Dedicated Divider and Delay Blocks on Each Clock Output
  • Pin Compatible Family of Clocking Devices
  • 3.15 to 3.45 V Operation
  • Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)

Description

The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), three LVDS, and five LVPECL clock output distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

The clock conditioner comes in a 48-pin WQFN package and is footprint compatible with other clocking devices in the same family.

The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), three LVDS, and five LVPECL clock output distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

The clock conditioner comes in a 48-pin WQFN package and is footprint compatible with other clocking devices in the same family.

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